RU82566DM Q 881 Intel, RU82566DM Q 881 Datasheet - Page 13

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RU82566DM Q 881

Manufacturer Part Number
RU82566DM Q 881
Description
Manufacturer
Intel
Datasheet

Specifications of RU82566DM Q 881

Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
81
Lead Free Status / RoHS Status
Compliant
ICH9/82566/82567LM/82567V—NVM Information Guide
1.4.14
Table 10.
1.4.15
Table 11.
LAN Power Consumption (Word 10h)
This word is only relevant when power management is enabled.
LAN Power Consumption (Word 10h)
Shared Initialization Control (Word 13h)
This word controls general initialization values.
Shared Initialization Control (Word 13h)
15:8
7:5
4:0
15:14
13:12
11
10
9
8
7:6
Bit
Bit
LAN D0
Power
Reserved
LAN D3
Power
SIGN
Reserved
Ext Pwr Polarity
Reserved
PHY PD Enable
Reserved
PHYT
Name
Name
0Dh for 82566/
82567LM
04h for 82562V
000b
00001b for 82566/
82567LM
00010b for 82562V
Default
10b
00b
0b
1b
1b
0b
00b
Default
This is a 2-bit field indicating whether a valid NVM is present to the
MAC. If this field does not equal 10b, the MAC does not read the
NVM data and uses default values for device configuration.
00b = Invalid NVM.
01b = Invalid NVM.
10b = Valid NVM present.
11b = Invalid NVM.
These bits are reserved and should be set to 00b.
LANPHYPC External Power Polarity
When set to 0b, defines an active high-power enable signal. When
set to 1b, defines an active low power enable signal.
0b = LAN PHY Power Control is active high.
1b = LAN PHY Power Control is active low.
Note: This bit is loaded to the EXTPPOL bit in the CTRL_EXT
register.
Reserved. Always set to 1b.
PHY Power Down in D3/Dr (if WoL is disabled)
0b = Disable power down in non D0.
1b = Enable power down in non D0.
This bit is loaded to the PHY Power Down Enable bit in the
CTRL_EXT register.
This bit is reserved and should be set to 0b.
This field indicates the PHY device type.
00b = 82566/82567LM PHY - GLCI mode
01b = Reserved
10b = 82562V PHY - PCIe mode, LCI mode
11b = Reserved
This field is reflected in the PHYTYPE field in the Status register.
The value in this field is reflected in the PCI Power Management
Data Register of the LAN function for D0 power consumption
and dissipation (Data_Select = 0 or 4). Power is defined in 100
mW units and includes the external logic required for the LAN
function.
These bits are reserved and should be set to 000b.
The value in this field is reflected in the PCI Power Management
Data Register of the LAN function for D3 power consumption
and dissipation (Data_Select = 3 or 7). Power is defined in 100
mW units and includes the external logic required for the LAN
function. The most significant bits in the Data Register that
reflects the power values are padded with zeros.
Description
Description
13

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