BOXD945GTPLKR Intel (CPU), BOXD945GTPLKR Datasheet - Page 26

• Manufacturer Part Number: BOXD945GTPLKR
• Manufacturer: Intel (CPU)

Specifications of BOXD945GTPLKR

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Intel Desktop Board D945GTP Technical Product Specification
1.5.4 Real-Time Clock, CMOS SRAM, and Battery
1.6 PCI Express* Connectors
1.7 IEEE-1394a Connectors (Optional)
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A coin-cell battery (CR2032) powers the real-time clock and CMOS memory. When the computer
is not plugged into a wall socket, the battery has an estimated life of three years. When the
computer is plugged in, the standby current from the power supply extends the life of the battery.
The clock is accurate to ± 13 minutes/year at 25 ºC with 3.3 VSB applied.
If the battery and AC power fail, custom defaults, if previously saved, will be loaded into CMOS
RAM at power-on.
The board provides the following PCI Express connectors:
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•
The PCI Express interface supports the PCI Conventional bus configuration mechanism so that the
underlying PCI Express architecture is compatible with PCI Conventional compliant operating
systems. Additional features of the PCI Express interface include the following:
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•
•
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The optional IEEE-1394a interface addresses interconnection of both computer peripherals and
consumer electronics. The IEEE-1394a interface provides a throughput ranging from
100 Mbits/sec to 400 Mbits/sec. As a manufacturing option, the board includes three IEEE-1394a
connectors as follows:
•
•
NOTE
For information about
The location of the back panel IEEE-1394a connector
The location of the front panel IEEE-1394a connectors
The signal names of the front panel IEEE-1394a connectors
One PCI Express x16 connector supporting simultaneous transfer speeds up to 8 GBytes/sec
One PCI Express x1 connector. The x1 interface supports simultaneous transfer speeds up to
500 MBytes/sec
Support for the PCI Express enhanced configuration mechanism
Automatic discovery, link training, and initialization
Support for Active State Power Management (ASPM)
SMBus 2.0 support
Wake# signal supporting wake events from ACPI S1, S3, S4, or S5
Software compatible with the PCI Power Management Event (PME) mechanism defined in the
PCI Power Management Specification Rev. 1.1
One IEEE-1394a connector located on the back panel.
Two IEEE-1394a front-panel connectors located on the component side.
Refer to
Figure 18, page 54
Figure 20, page 56
Section 2.8.2.6, page 64