SSTUH32865ET/G-S NXP Semiconductors, SSTUH32865ET/G-S Datasheet - Page 13

• Manufacturer Part Number: SSTUH32865ET/G-S
• Manufacturer: NXP Semiconductors

Specifications of SSTUH32865ET/G-S

• Logic Family: SSTU
• Logical Function: Reg Bfr W/ParityTst
• Number Of Elements: 1
• Number Of Bits: 28
• Number Of Inputs: 28
• Number Of Outputs: 56
• High Level Output Current: -12mA
• Low Level Output Current: 12mA
• Propagation Delay Time: 3ns
• Operating Supply Voltage (typ): 1.8V
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Clock-edge Trigger Type: Posit/Negat-Edge
• Polarity: Non-Inverting
• Technology: CMOS
• Frequency (max): 450(Min)MHz
• Mounting: Surface Mount
• Pin Count: 160
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Compliant

Philips Semiconductors
9397 750 14136
Product data sheet
Fig 6. RESET switches from HIGH to LOW
PARIN
PTYERR
(1) After RESET is switched from HIGH to LOW, all data and clock input signals must be set and held at valid logic levels (not
RESET
Dn
DCSn
CK
CK
Qn
(1)
floating) for a minimum time of t
(1)
(1)
(1)
INACT(max)
RESET to Q
.
Rev. 01 — 11 March 2005
t
RPHL
1.8 V high output drive DDR registered buffer with parity
HIGH, LOW, or Don't care
t
INACT
t
RESET to PTYERR
RPLH
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
HIGH or LOW
SSTUH32865
002aaa985
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