HD74SSTV16857T HITACHI, HD74SSTV16857T Datasheet

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HD74SSTV16857T

Manufacturer Part Number
HD74SSTV16857T
Description
Manufacturer
HITACHI
Datasheet

Specifications of HD74SSTV16857T

Lead Free Status / RoHS Status
Not Compliant
To our customers,
Corporation, and Renesas Electronics Corporation took over all the business of both
companies. Therefore, although the old company name remains in this document, it is a valid
Renesas Electronics document. We appreciate your understanding.
Issued by: Renesas Electronics Corporation (http://www.renesas.com)
Send any inquiries to http://www.renesas.com/inquiry.
On April 1
st
, 2010, NEC Electronics Corporation merged with Renesas Technology
Renesas Electronics website:
Old Company Name in Catalogs and Other Documents
http://www.renesas.com
April 1
Renesas Electronics Corporation
st
, 2010

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HD74SSTV16857T Summary of contents

Page 1

To our customers, Old Company Name in Catalogs and Other Documents st On April 1 , 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the ...

Page 2

All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please confirm ...

Page 3

... Supports LVCMOS reset (RESET) input / SSTL_2 data (D) inputs and CLK input Differential SSTL_2 (Stub series terminated logic) CLK signal Flow through architecture optimizes PCB layout Ordering Information Part Name Package Type HD74SSTV16857TEL TSSOP-48 pin HD74SSTV16857NEL TVSOP-48 pin Note: Please consult the sales office for the above package availability. Function Table ...

Page 4

HD74SSTV16857 Pin Arrangement GND V GND V V GND V GND V GND Rev.7.00 Apr 07, 2006 page DDQ DDQ ...

Page 5

HD74SSTV16857 Absolute Maximum Ratings Item Supply voltage *1 Input voltage *1, 2 Output voltage Input clamp current Output clamp current Continuous output current GND current / pin CC DDQ Maximum power dissipation 55°C ...

Page 6

HD74SSTV16857 Logic Diagram RESET CLK CLK D1 V REF 1. RESET input gate is connected to V Note: Electrical Characteristics Item Symbol Input diode voltage Output voltage Input current (All inputs) Quiescent supply current I Standby current I CC (stdy) ...

Page 7

HD74SSTV16857 Switching Characteristics Item *1 Clock frequency Setup time Fast slew rate Slow slew rate Hold time Fast slew rate Slow slew rate Differential inputs active time Differential inputs inactive time Pulse width *3 Output slew Item Symbol Maximum clock ...

Page 8

HD74SSTV16857 Waveforms – 1 LVCMOS RESET Input * Waveforms – 2 Input Timing input Input Waveforms – 3 Timing input Output Rev.7.00 Apr 07, 2006 page inact 10 ...

Page 9

HD74SSTV16857 Waveforms – 4 LVCMOS RESET Input Output Notes tested with clock and data inputs held All input pulses are supplied by generators having the following characteristics : PRR 10 MHz ...

Page 10

HD74SSTV16857 Application Data Pull-down 100 0.0 Pull-up 0.0 0 -20 -40 -60 -80 -100 Rev.7.00 Apr 07, 2006 page 0.5 1.0 1.5 Voltage (V) Figure . 1 Voltage (V) 0.5 1.0 1.5 ...

Page 11

HD74SSTV16857 Curve Data Voltage (V) I (mA) Min 0.0 0.1 0.2 10 0.3 15 0.4 19 0.5 23 0.6 27 0.7 30.5 0.8 34 0.9 36.5 1.0 38.5 1.1 40 1.2 42 1.3 43 1.4 44 1.5 44 1.6 45 ...

Page 12

HD74SSTV16857 Package Dimensions JEITA Package Code RENESAS Code P-TSSOP48-6.1x12.5-0.50 PTSP0048KA Index mark JEITA Package Code RENESAS Code P-TSSOP48-4.4x9.7-0.40 PTSP0048LA Index mark Rev.7.00 Apr 07, 2006 page 10 of ...

Page 13

Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead ...

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