PI74SSTU32864NB Pericom Semiconductor, PI74SSTU32864NB Datasheet - Page 4

• Manufacturer Part Number: PI74SSTU32864NB
• Manufacturer: Pericom Semiconductor

Specifications of PI74SSTU32864NB

• Logic Family: SSTU
• Logical Function: Registered Buffer
• Number Of Elements: 1
• Number Of Bits: 25
• Number Of Inputs: 25
• Number Of Outputs: 25
• High Level Output Current: -8mA
• Low Level Output Current: 8mA
• Package Type: LFBGA
• Propagation Delay Time: 3ns
• Operating Supply Voltage (typ): 1.8V
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Clock-edge Trigger Type: Posit/Negat-Edge
• Polarity: Non-Inverting
• Technology: CMOS
• Frequency (max): 270(Min)MHz
• Mounting: Surface Mount
• Pin Count: 96
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Not Compliant

Terminal Functions
Function Table (each flip flop)
GND
V
V
Z
Z
CK
CK
C0, C1
RST
CSR, DCS
D1, D25
DODT
DCKE
Q1-Q25
QCS
QODT
QCKE
OH
OL
Name
DD
REF
RST
H
H
H
H
H
H
H
H
H
H
H
H
L
Ground
Power Supply
Input Reference Voltage
Reserved for future use
Reserved for future use
Positive master clock input
Negative master clock input
Configuration control inputs
Asynchronous reset input - resets registers and disables V
tial - input receivers
Chip select inputs disables D1-D24 outputs switching when both inputs are high
Data input - clocked in on the crossing of the rising edge of CK and the falling edge
of CK
The outputs of this register bit will not be suspended by the DCS and CSR control
The outputs of this register bit will not be suspended by the DCS and CSR control
Data outputs that are suspended by the DCS and CSR control
Data output that will not be suspended by the DCS and CSR controll
Data output that will not be suspended by the DCS and CSR controll
Data output that will not be suspended by the DCS and CSR controll
X or floating X or floating X or floating X or floating X or floating
DCS
H
H
H
H
H
H
L
L
L
L
L
L
CSR
H
H
H
H
H
H
L
L
L
L
L
L
Inputs
L or H
L or H
L or H
L or H
CK
↑
↑
↑
↑
↑
↑
↑
↑
Description
L or H
L or H
L or H
L or H
CK
4
↓
↓
↓
↓
↓
↓
↓
↓
REF
Dn, DODT,
data and clock differen-
DCKE
H
X
H
X
H
X
H
X
L
L
L
L
Qn
Q0
Q0
Q0
Q0
Q0
Q0
H
H
H
L
L
L
L
25-Bit 1:1 or 14-Bit 1:2
Ground Input
1.8V nominal
0.9V nominal
Input
Input
Differential Clock input
Differential Clock input
LVCMOS inputs
LVCMOS inputs
SSTL_18 input
SSTL_18 input
SSTL_18 input
SSTL_18 input
1.8V CMOS
1.8V CMOS
1.8V CMOS
1.8V CMOS
Outputs
Configurable Buffer
QCS
Q0
Q0
Q0
Q0
Characteristics
H
H
H
H
L
L
L
L
L
PI74SSTU32864
PS8636B
QODT,
QCKE
Q0
Q0
Q0
Q0
H
H
H
H
L
L
L
L
L
07/26/04