N74F524D-T NXP Semiconductors, N74F524D-T Datasheet - Page 2

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N74F524D-T

Manufacturer Part Number
N74F524D-T
Description
Manufacturer
NXP Semiconductors
Type
Magnitude Comparatorr
Datasheet

Specifications of N74F524D-T

Logic Family
F
Technology
Bipolar
Low Level Output Current
24mA
Output Function
A<B, A=B, A>B
Package Type
SO
Mounting
Surface Mount
Pin Count
20
Polarity
Non-Inverting
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Number Of Bits
8
Lead Free Status / RoHS Status
Not Compliant
Philips Semiconductors
FEATURES
DESCRIPTION
The 74F524 is an 8-bit bidirectional register with parallel input and
output, plus serial input and output progressing from MSB to LSB.
All data inputs, serial and parallel, are loaded by the rising edge of
the clock. The device functions are controlled by two control lines
(S0, S1) to execute shift, load, hold and read out. An 8-bit
comparator examines the data stored in the registers and on the
data bus. Three true-High, open collector outputs representing
‘register equal to bus’, ‘register greater than bus’ and ‘register less
than bus’ are provided. These outputs can be disabled to the OFF
state by the use of Status Enable (SE). A mode control has also
been provided to allow Two’s Complement as well as magnitude
compare. Linking inputs are provided for expansion to longer words.
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
NOTE:
One (1.0) FAST Unit Load (U.L.) is defined as 20 A in the High state and 0.6mA in the Low state.
OC=Open Collector
1990 Aug 07
I/On
S0, S1
C/SI
CP
SE
M
I/On
C/SO
LT
EQ
GT
8-Bit bidirectional register with bus-oriented input-output
Independent serial input-output to register
Register bus comparator with ‘equal to’, ‘greater than’ and
‘less than’ outputs
Cascadable in groups of 8-bits
Open collector comparator outputs for AND-wired expansion
Two’s complement or magnitude compare
8-bit register comparator (open collector + 3-State)
PINS
Parallel data inputs
Mode select inputs
Status priority or serial data input
Clock pulse input (active rising edge)
Status enable input (active Low)
Compare mode select input
3-state parallel data outputs
Status priority or serial data output
Register less than bus output
Register equal to bus output
Register greater than bus output
DESCRIPTION
2
PIN CONFIGURATION
ORDERING INFORMATION
20-pin plastic SOL
20-pin plastic DIP
DESCRIPTION
74F524
TYPE
TYPICAL f
GND
65MHz
I/O0
I/O1
I/O2
I/O3
I/O4
I/O6
I/O7
I/O5
S0
T
amb
V
10
1
2
3
4
5
6
7
8
9
COMMERCIAL
HIGH/LOW
MAX
CC
74F(U.L.)
N74F524N
N74F524D
= 0 C to +70 C
3.5/1.0
1.0/1.0
1.0/1.0
1.0/1.0
1.0/1.0
1.0/1.0
150/40
OC/33
OC/33
OC/33
50/33
RANGE
= 5V 10%,
TYPICAL SUPPLY CURRENT
SF00970
20
19
18
17
16
15
14
13
12
11
Product specification
V
S1
SE
C/SI
C/SO
EQ
GT
LT
M
CP
(TOTAL)
CC
110mA
LOAD VALUE
3.0mA/24mA
1.0mA/20mA
70 A/0.6mA
20 A/0.6mA
20 A/0.6mA
20 A/0.6mA
20 A/0.6mA
20 A/0.6mA
853–0373 00135
HIGH/LOW
PKG DWG #
OC/20mA
OC/20mA
OC/20mA
74F524
SOT146-1
SOT163-1

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