GTL2000DL NXP Semiconductors, GTL2000DL Datasheet - Page 5

GTL2000DL

Manufacturer Part Number
GTL2000DL
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of GTL2000DL

Technology
BiCMOS
Operating Supply Voltage (typ)
1.8/2.5/3.3/5V
Operating Supply Voltage (max)
5.5V
Abs. Propagation Delay Time
5.5ns
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Output Type
Open Drain
Lead Free Status / RoHS Status
Compliant

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Quantity:
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Philips Semiconductors
Uni-directional down translation
For uni-directional clamping, higher voltage to lower voltage, the G
V
open drain. The opposite side of the reference transistor (S
through a 200 kΩ resistor to a 3.3 V to 5.5 V V
output voltage equal to S
Uni-directional up translation
For uni-directional up translation, lower voltage to higher voltage, the reference transistor is connected the same as for a down translation. A
pull-up resistor is required on the higher voltage side (Dn or Sn) to get the full high level, since the GTL-TVC device will only pass the reference
source (S
drain.
2003 Apr 01
CC
22-bit bi-directional low voltage translator
PROCESSOR GEOMETRY
through a pull-up resistor (typically 200 kΩ). A filter capacitor on D
EASY MIGRATION TO
LOWER VOLTAGE AS
PROCESSOR GEOMETRY
EASY MIGRATION TO
LOWER VOLTAGE AS
REF
SHRINKS.
) voltage as a high when doing an up translation. The driver on the lower voltage side only needs pull-up resistors if it is open
SHRINKS.
1.8 V
1.5 V
1.2 V
1.0 V
1.8 V
1.5 V
1.2 V
1.0 V
REF
TOTEM POLE I/O
OR OPEN DRAIN
Figure 2. Uni-directional down translation, to protect low voltage processor pins
.
V
CORE
CPU I/O
Figure 3. Uni-directional up translation, to higher voltage chip sets
V
CORE
CPU I/O
TYPICAL UNI-DIRECTIONAL - HIGH TO LOW VOLTAGE TRANSLATION
TYPICAL UNI-DIRECTIONAL - LOW TO HIGH VOLTAGE TRANSLATION
CC
supply and S
REF
) is connected to the processor core supply voltage. When D
REF
REF
is set between 1.0 V to V
5
input must be connected to D
REF
S
S
GND
GND
is recommended. Pull up resistors are required if the chipset I/O are
GTL2002
S1
S2
GTL2002
S1
S2
REF
REF
G
D
G
D
REF
REF
REF
D1
D2
REF
D1
D2
CC
- 1.5 V, the output of each Sn has a maximum
200 KΩ
200 KΩ
REF
and both pins pulled to the higher side
TOTEM POLE I/O
CHIPSET I/O
V
CC
CHIPSET I/O
REF
GTL2000
V
CC
is connected
Product data
5 V
5 V
SA00643
SA00644

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