IP-POSPHY/P2 Altera, IP-POSPHY/P2 Datasheet - Page 27

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IP-POSPHY/P2

Manufacturer Part Number
IP-POSPHY/P2
Description
Manufacturer
Altera
Datasheet

Specifications of IP-POSPHY/P2

Lead Free Status / RoHS Status
Not Compliant
Chapter 2: Getting Started
Compile the Design
Compile the Design
Program a Device
© November 2009 Altera Corporation
f
Figure 2–16. Example of New Test Bench Settings for NativeLink
10. When you have entered the required information for your new testbench, click
11. Click OK in the Test Benches window and then click OK in the Settings window.
12. On the Tools menu, point to Run EDA Simulation Tool and click EDA RTL
You can use the Quartus II software to compile your design. Refer to Quartus II Help
for instructions on compiling your design.
After you have compiled your design, program your targeted Altera device, and
verify your design in hardware.
With Altera's free OpenCore Plus evaluation feature, you can evaluate the POS-PHY
Level 2 and 3 Compiler before you purchase a license. OpenCore Plus evaluation
allows you to generate an IP functional simulation model, and produce a time-limited
programming file.
For more information on IP functional simulation models, refer to the
Altera IP in Third-Party Simulation Tools
You can simulate the POS-PHY Level 2 and 3 Compiler in your design, and perform a
time-limited evaluation of your design in hardware.
OK in the New Test Bench Settings window.
Simulation. The simulation now begins with your chosen simulation tool.
Preliminary
chapter in volume 3 of the Quartus II Handbook.
POS-PHY Level 2 and 3 Compiler User Guide
Simulating
2–15

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