SAA7144HL/V1,557 Trident Microsystems, Inc., SAA7144HL/V1,557 Datasheet - Page 57

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SAA7144HL/V1,557

Manufacturer Part Number
SAA7144HL/V1,557
Description
Manufacturer
Trident Microsystems, Inc.
Datasheet

Specifications of SAA7144HL/V1,557

Lead Free Status / RoHS Status
Supplier Unconfirmed
Philips Semiconductors
16. Test information
9397 750 14454
Product data sheet
16.1.1 Initialization of boundary scan circuit
16.1 Boundary scan test
The SAA7144HL has built-in logic and five dedicated pins to support boundary scan
testing which allows board testing without special hardware (nails). The SAA7144HL
follows the “IEEE Std. 1149.1 - Standard Test Access Port and Boundary - Scan
Architecture” set by the Joint Test Action Group (JTAG) chaired by Philips.
The 5 special pins are: Test Mode Select (TMS), Test Clock (TCK), Test Reset (TRST_N),
Test Data Input (TDI) and Test Data Output (TDO).
The Boundary Scan Test (BST) functions BYPASS, EXTEST, INTEST, SAMPLE, CLAMP
and IDCODE are all supported (see
found in the specification “IEEE Std. 1149.1” .
Table 60:
The Test Access Port (TAP) controller of an IC should be in the reset state
(TEST_LOGIC_RESET) when the IC is in the functional mode. This reset state also
forces the instruction register into a functional instruction such as IDCODE or BYPASS.
To solve the power-up reset, the standard specifies that the TAP controller will be forced
asynchronously to the TEST_LOGIC_RESET state by setting the TRST_N pin LOW.
Instruction
BYPASS
EXTEST
INTEST
SAMPLE
CLAMP
IDCODE
BST instructions supported by the SAA7144HL
Description
This mandatory instruction provides a minimum length serial path (1 bit) between
pins TDI and TDO when no test operation of the component is required.
This mandatory instruction allows testing of off-chip circuitry and board level
interconnections.
This optional instruction allows testing of the internal logic (no support for
customers available).
This mandatory instruction can be used to take a sample of the inputs during
normal operation of the component. It can also be used to preload data values into
the latched outputs of the boundary scan register.
This optional instruction is useful for testing when not all ICs have BST. This
instruction addresses the bypass register while the boundary scan register is in
external test mode.
This optional instruction will provide information on the components manufacturer,
part number and version number.
Rev. 01 — 21 April 2005
Table
60). Details about the JTAG BST-test can be
Quadruple video input processor
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
SAA7144HL
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