SAA7111AH NXP Semiconductors, SAA7111AH Datasheet - Page 29

• Manufacturer Part Number: SAA7111AH
• Manufacturer: NXP Semiconductors

Specifications of SAA7111AH

• Pin Count: 64
• Package Type: PQFP
• Lead Free Status / RoHS Status: Compliant

Philips Semiconductors
1998 May 15
handbook, full pagewidth
handbook, full pagewidth
Enhanced Video Input Processor (EVIP)
Timing is compatible with SAA7110; I
(1) Set to zero for one transmission, if a phase reset of the f
The HPLL increment represents the actual LFCO frequency (f
Where: f
The f
Where: word length DTO1 = 24 bits.
f
LFCO
f
sc
sc
increment represents the actual subcarrier frequency (related to the actual clock); 23 LSB from 24, MSB is 0b.
=
XTAL
=
INCR
------------------------------------------------------ -
INCR
------------------------------------------------ -
2
= 24.576 MHz, word length DTO2 = 20 bits.
2
HREF
CREF
TIME SLOT:
word length DTO2
VPO
word length DTO1
LLC
BIT NO.:
Fig.19 FEI timing diagram (FEI sampling at CREF = LOW) for OFTS = 0, 1 or 2).
FEI
FSCPLL
HPLL
HIGH
128
f
XTAL
f
XTAL
LOW
0
1
15
2
C-bus bit FECO = 0.
INCR
--------------------------- -
INCR HPLL
2
19
t SU;DAT
HPLL
16
Fig.20 Real time control output.
transmitted once per line
0
16
2
t PDZ
19
22
sc
to 3-state
21
DTO is applied via I
20
LFCO
19
18
29
4 = f
17
16
t OHD;DAT
LLC
15
); 16 LSB from 20, upper four bits are fixed to 0100b.
INCR FSCPLL
14
13
2
t HD;DAT
C-bus bit CDTO. RTCO sequence is generated in LLC/4.
12
11 10
45
from 3-state
9
8
7
6
5
4
3
t PD
2
1
0
63
3
SEQUENCE
67
1
Product specification
MGC657
68
50 Hz fields: 235
60 Hz fields: 232
SAA7111A
RESERVED
DTO RESET
MGC649
(1)