935270225557 NXP Semiconductors, 935270225557 Datasheet - Page 47
935270225557
Manufacturer Part Number
935270225557
Description
Manufacturer
NXP Semiconductors
Datasheet
1.935270225557.pdf
(72 pages)
Specifications of 935270225557
Pin Count
64
Package Type
LQFP
Lead Free Status / RoHS Status
Compliant
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Philips Semiconductors
17.2.7
Table 19 Horizontal sync stop SA 07, D7 to D0
17.2.8
Table 20 Sync control SA 08, D7 to D5, D3 to D0
1998 May 15
Vertical noise reduction (VNOI)
Normal mode
Searching mode
Free running mode
Vertical noise reduction bypassed
Horizontal PLL (HPLL)
PLL closed
PLL open, horizontal frequency fixed
TV/VTR mode select (VTRC)
TV mode
(recommended for poor quality TV signals only)
VTR mode (recommended as default setting)
Extended loop filter (EXFIL)
Word width of the loop filter (LF2) amplification = 16-bit
Word width of the loop filter (LF2) amplification = 14-bit
Field selection (FSEL)
50 Hz, 625 lines
60 Hz, 525 lines
Automatic field detection (AUFD)
Field state directly controlled via FSEL
Automatic field detection
Enhanced Video Input Processor (EVIP)
(STEP SIZE = 8/LLC)
109...127 (50Hz)
108...127 (60Hz)
DELAY TIME
...108 (50Hz)
...107 (60Hz)
S
S
128... 108
UBADDRESS
UBADDRESS
107...
07
08
FUNCTION
HSS7
1
0
0
HSS6
0
1
1
forbidden (outside available central counter range)
forbidden (outside available central counter range)
HSS5
47
0
1
1
CONTROL BITS D7 to D0
HSS4
BIT NAME
1
0
0
VNOI1
VNOI0
VNOI1
VNOI0
VNOI1
VNOI0
VNOI1
VNOI0
EXFIL
EXFIL
VTRC
VTRC
AUFD
AUFD
HPLL
HPLL
FSEL
FSEL
HSS3
0
1
1
LOGIC LEVEL
HSS2
1
1
0
0
0
0
1
1
0
1
1
0
1
0
1
0
1
0
1
0
1
Product specification
HSS1
SAA7111A
0
0
1
CONTROL BIT
D1
D0
D1
D0
D1
D0
D1
D0
D2
D2
D3
D3
D5
D5
D6
D6
D7
D7
HSS0
1
0
1
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