MC94MX21DVKN3 Freescale, MC94MX21DVKN3 Datasheet - Page 50
MC94MX21DVKN3
Manufacturer Part Number
MC94MX21DVKN3
Description
Manufacturer
Freescale
Datasheet
1.MC94MX21DVKN3.pdf
(98 pages)
Specifications of MC94MX21DVKN3
Operating Temperature (max)
70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
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Specifications
3.16
Synchronous Serial Interface
The transmit and receive sections of the SSI can be synchronous or asynchronous. In synchronous mode,
the transmitter and the receiver use a common clock and frame synchronization signal. In asynchronous
mode, the transmitter and receiver each have their own clock and frame synchronization signals.
Continuous or gated clock mode can be selected. In continuous mode, the clock runs continuously. In gated
clock mode, the clock functions only during transmission. The internal and external clock timing diagrams
are shown in
Figure 42
through
Figure
45.
Normal or network mode can also be selected. In normal mode, the SSI functions with one data word of
I/O per frame. In network mode, a frame can contain between 2 and 32 data words. Network mode is
typically used in star or ring-time division multiplex networks with other processors or codecs, allowing
interface to time division multiplexed networks without additional logic. Use of the gated clock is not
allowed in network mode. These distinctions result in the basic operating modes that allow the SSI to
communicate with a wide variety of devices.
The SSI can be connected to 4 set of ports, SAP, SSI1, SSI2 and SSI3.
1
CK Output
4
2
FS (bl) Output
6
8
FS (wl) Output
12
10
11
STXD Output
31
32
SRXD Input
Note: SRXD input in synchronous mode only.
Figure 42. SSI Transmitter Internal Clock Timing Diagram
MC94MX21 Technical Data, Rev. 1.
50
Freescale Semiconductor
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