MC9328MX1CVM15 Freescale, MC9328MX1CVM15 Datasheet - Page 69

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MC9328MX1CVM15

Manufacturer Part Number
MC9328MX1CVM15
Description
Manufacturer
Freescale
Datasheet

Specifications of MC9328MX1CVM15

Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant

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Part Number
Manufacturer
Quantity
Price
Part Number:
MC9328MX1CVM15
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC9328MX1CVM15R2
Manufacturer:
Freescale Semiconductor
Quantity:
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4.10.1
The card identification and card operation conditions timing are processed in open-drain mode. The card
response to the host command starts after exactly N
SET_RCA is also processed in the open-drain mode. The minimum delay between the host command and
card response is NCR clock cycles as illustrated in
Figure 52
Freescale Semiconductor
1
2
3
Ref
No.
C
C
C
3a
3b
4a
4b
5a
5b
6a
6b
1
2
7
L
L
L
100 pF / 250 pF (10/30 cards)
25 pF (1 card)
are defined in
250 pF (21 cards)
CLK frequency at Data transfer Mode
(PP)
CLK frequency at Identification Mode
Clock high time
Clock low time
Clock fall time
Clock rise time
Input hold time
Input setup time
Output hold time
Output setup time
Output delay time
Symbol
Command Response Timing on MMC/SD Bus
CRC
D
1
Z
*
—10/30 cards
Table 29. State Signal Parameters for
Cyclic redundancy check bits (7 bits)
1
1
1
3
—10/30 cards
1
Parameter
—10/30 cards
—10/30 cards
—10/30 cards
3
—10/30 cards
3
Table
—10/30 cards
—10/30 cards
3
3
—10/30 cards
Card Active
High impedance state
Table 28. SDHC Bus Timing Parameter Table
29.
Definition
Repetition
Data bits
MC9328MX1 Technical Data, Rev. 7
2
Minimum
10.3/10.3
10.3/10.3
5.7/5.7
5.7/5.7
15/75
6/33
Figure
0
0
0
ID
1.8 ± 0.1 V
clock cycles. For the card address assignment,
Symbol
S
T
P
E
Figure 48
48. The symbols for
Maximum
(5.00)
(6.67)
10/50
14/67
25/5
400
16
Transmitter bit (Host = 1, Card = 0)
Functional Description and Application Information
3
3
through
Host Active
One-cycle pull-up (1)
Minimum
10/50
10/50
Start bit (0)
Definition
End bit (1)
9/9
9/9
5/5
5/5
0
0
0
Figure 52
3.0 ± 0.3 V
Figure 48
Maximum
10/50
10/50
25/5
400
14
through
MHz
Unit
kHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
69

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