MCIMX351AJQ5C Freescale, MCIMX351AJQ5C Datasheet - Page 75
MCIMX351AJQ5C
Manufacturer Part Number
MCIMX351AJQ5C
Description
Manufacturer
Freescale
Datasheet
1.MCIMX351AJQ5C.pdf
(148 pages)
Specifications of MCIMX351AJQ5C
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
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4.9.13.3
Functionality and electrical characteristics of the synchronous interface to dual-port smart displays are
identical to parameters of the synchronous interface. See
TFT LCD Panels, Electrical Characteristics.”
4.9.13.3.6
The interface has an 8-bit data bus, transferring a single 8-bit value (Y/U/V) in each cycle. The bits
D7–D0 of the value are mapped to bits LD17–LD10 of the data bus, respectively.
interface timing.
Freescale Semiconductor
•
•
•
•
•
The frequency of the clock DISPB_D3_CLK is 27 MHz.
The DISPB_D3_HSYNC, DISPB_D3_VSYNC and DISPB_D3_DRDY signals are active low.
The transition to the next row is marked by the negative edge of the DISPB_D3_HSYNC signal.
It remains low for a single clock cycle.
The transition to the next field/frame is marked by the negative edge of the DISPB_D3_VSYNC
signal. It remains low for at least one clock cycle.
— At a transition to an odd field (of the next frame), the negative edges of DISPB_D3_VSYNC
— At a transition to an even field (of the same frame), they do not coincide.
The active intervals—during which data is transferred—are marked by the DISPB_D3_HSYNC
signal being high.
and DISPB_D3_HSYNC coincide.
Synchronous Interface to Dual-Port Smart Displays
Interface to a TV Encoder—Functional Description
i.MX35 Applications Processors for Automotive Products, Rev. 9
Section 4.9.13.1.5, “Interface to Active Matrix
Figure 53
depicts the
75
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