MCIMX351AJQ5C Freescale, MCIMX351AJQ5C Datasheet - Page 32
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MCIMX351AJQ5C
Manufacturer Part Number
MCIMX351AJQ5C
Description
Manufacturer
Freescale
Datasheet
1.MCIMX351AJQ5C.pdf
(148 pages)
Specifications of MCIMX351AJQ5C
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
Available stocks
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Price
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Quantity:
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Part Number:
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4.9.3
There are three PLLs inside the i.MX35, all based on the same PLL design. The reference clock for these
PLLs is normally generated from an external 24-MHz crystal connected to an internal oscillator via
EXTAL24M and XTAL24 pins. It is also possible to connect an external 24-MHz clock directly to
EXTAL24M, bypassing the internal oscillator.
DPLL specifications are listed in
1
4.9.4
ETM is an ARM protocol. The timing specifications in this section are given as a guide for a test point
access (TPA) that supports TRACECLK frequencies up to 133 MHz.
Figure 9
32
Reference clock frequency
Max. allowed reference clock phase noise
Frequency lock time (FOL mode or non-integer MF)
Phase lock time
Max. allowed PL voltage ripple
There are two PLL are used in the i.MX35, MPLL and PPLL. Both are based on same DPLL design.
CS10
CS11
ID
depicts the TRACECLK timings of ETM, and
MISO hold time
SPI_RDY setup time
DPLL Electrical Specifications
Embedded Trace Macrocell (ETM) Electrical Specifications
Parameter
i.MX35 Applications Processors for Automotive Products, Rev. 9
Table 26. CSPI Interface Timing Parameters (continued)
Parameter
Figure 9. ETM TRACECLK Timing Diagram
Table
Table 27. DPLL Specifications
27.
Min. Typ. Max.
10
—
—
—
—
Table 28
24
—
—
—
—
Symbol
t
t
0.03
0.01
0.15
Hmiso
SDRY
100
100
150
100
150
80
lists the timing parameters.
2 Tdck
MHz
Unit
mV
μs
μs
1
Fmodulation < 50 kHz
50 kHz < Fmodulation 300 Hz
Fmodulation > 300 KHz
Fmodulation < 50 kHz
50 kHz < Fmodulation 300 Hz
Fmodulation > 300 KHz
Min.
5
5
Freescale Semiconductor
Comments
Max.
—
—
—
—
Units
ns
ns
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