MCIMX287CVM4B Freescale, MCIMX287CVM4B Datasheet - Page 30

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MCIMX287CVM4B

Manufacturer Part Number
MCIMX287CVM4B
Description
Manufacturer
Freescale
Datasheet

Specifications of MCIMX287CVM4B

Lead Free Status / RoHS Status
Compliant

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3.4.3.1
Figure 5
and Mobile-DDR1 memory devices.
30
DDR1
DDR2
DDR3
ID
and
EMI_CLKN
EMI_CLK
EMI_CE0N
EMI_RASN
EMI_CASN
EMI_WEN
EMI_ADDR
Table 34
EMI Command & Address AC Timing
CK cycle time
CK high level width
CK low level width
i.MX28 Applications Processor Data Sheet for Consumer Products, Rev. 0
specify the timing related to the address and command pins that interfaces DDR2
DDR4
Description
DDR4
Table 34. EMI Command/Address AC Timing
Figure 5. EMI Command/Address AC Timing
bank
row
DDR5
DDR5
Symbol
tCH
tCK
tCL
DDR4
DDR2
0.5 tCK
0.5 tCK
Min.
–0.5
–0.5
6
column
DDR1
bank
Freescale Semiconductor
0.5 tCK
0.5 tCK
Max.
+ 0.5
+ 0.5
DDR3
DDR5
Unit
ns
ns
ns

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