STPCE1HDBI STMicroelectronics, STPCE1HDBI Datasheet - Page 38
STPCE1HDBI
Manufacturer Part Number
STPCE1HDBI
Description
Manufacturer
STMicroelectronics
Datasheet
1.STPCE1HDBI.pdf
(87 pages)
Specifications of STPCE1HDBI
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Processing Unit
Microprocessor
Operating Supply Voltage (min)
2.45/3V
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
2.7/3.6V
Package Type
BGA
Screening Level
Industrial
Pin Count
388
Mounting
Surface Mount
Rad Hardened
No
Lead Free Status / RoHS Status
Supplier Unconfirmed
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ELECTRICAL SPECIFICATIONS
4.5.1. POWER ON SEQUENCE
Figure 4-3
the STPC, also called cold reset.
There is no dependency between the different
power supplies and there is no constraint on their
rising time.
SYSRSTI# as no constraint on its rising edge but
must stay active until power supplies are all within
specifications, a
recommended to let the STPC PLLs and strap
options stabilize.
38/87
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
Strap Options
Power Supplies
14 M Hz
SYSRSTI#
ISACLK
HCLK
PCI_CLK
SYSRSTO#
describes the power-on sequence of
margin
of
Figure 4-3. Power-on timing diagram
10 s
Release 1.3 - January 29, 2002
is
even
> 10 us
VALID CONFIGURATION
1.6 V
Strap Options are continuously sampled during
SYSRSTI# low and must remain stable. Once
SYSRSTI# is high, they MUST NOT CHANGE
until SYSRSTO# goes high.
Bus activity starts only few clock cycles after the
release of SYSRSTO#. The toggling signals
depend on the STPC configuration.
In ISA mode, activity is visible on PCI prior to the
ISA bus as the controller is part of the south
bridge.
In Local Bus mode, the PCI bus is not accessed
and the Flash Chip Select is the control signal to
monitor.
2.3 m s
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