STPCE1HDBI STMicroelectronics, STPCE1HDBI Datasheet - Page 31
STPCE1HDBI
Manufacturer Part Number
STPCE1HDBI
Description
Manufacturer
STMicroelectronics
Datasheet
1.STPCE1HDBI.pdf
(87 pages)
Specifications of STPCE1HDBI
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Processing Unit
Microprocessor
Operating Supply Voltage (min)
2.45/3V
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
2.7/3.6V
Package Type
BGA
Screening Level
Industrial
Pin Count
388
Mounting
Surface Mount
Rad Hardened
No
Lead Free Status / RoHS Status
Supplier Unconfirmed
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3.1.4. HCLK STRAP REGISTER CONFIGURATION
HCLK_Strap
Bit Number Sampled
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
MD3
Bit 7
7
0
0
0
0
0
0
1
1
Bits 7-3
Bits 2-0
This register defaults to the values sampled on MD[3:2] and MD[26:24] pins after reset
MD2
Bit 6
6
0
0
0
0
1
1
0
1
MD[3:2] & [26:24]
Mnemonic
Rsv
MD26
5
Bit 5
0
0
0
0
0
1
0
0
Table 3-4. HCLK Frequency
Release 1.3 - January 29, 2002
Access = 0022h/0023h
Description
These bits reflect the values sampled on MD[3:2] and MD[26:24] pins
respectively and control the Host clock frequency synthesizer, as given
in
Reserved
MD25
Table
4
Bit 4
0
0
1
1
0
1
1
0
3-4.
MD24
3
Bit 3
0
1
0
1
1
0
1
1
2
HCLK Frequency
Rsv
82.5 MHz
100 MHz
25 MHz
50 MHz
60 MHz
66 MHz
75 MHz
90 MHz
1
STRAP OPTION
Regoffset = 05Fh
0
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