TDA16888GNK Infineon Technologies, TDA16888GNK Datasheet - Page 10

• Manufacturer Part Number: TDA16888GNK
• Manufacturer: Infineon Technologies

Specifications of TDA16888GNK

• Start-up Supply Current: 50uA
• Switching Freq: 200kHz
• Operating Supply Voltage (min): 11V
• Operating Supply Voltage (max): 19V
• Operating Temp Range: -25C to 125C
• Operating Temperature Classification: Commercial
• Package Type: DSO
• Pin Count: 20
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

TDA 16888
PFC Section
At normal operation the PFC section operates with dual loop control. An inner loop,
which includes OP2, C1, FF1 and the PFC’s driver, controls the shape of the line current
by average current control enabling either continuous or discontinuous operation. By the
outer loop, which is supported by OP1, the multiplier, OP2, C1, FF1 and the PFC's driver,
the PFC output voltage is controlled. Furthermore there is a third control loop composed
of OTA1, OP2, C1, FF1 and the PFC’s driver, which allows the PFC section to be
operated as an auxiliary power supply even when the PWM section is disabled. With
disabled PWM section, however, the PFC section is operated with half of its nominal
operating frequency in order to reduce the overall current consumption.
Based on a pulse-width-modulation, which is leading edge triggered with respect to the
internal clock reference CLK OUT and which is trailing edge modulated according to the
V
V
PFC ramp signal
and the output voltage of OP2
(see Figure 18), the
PFC RMP
PFC CC
PFC section is designed for a maximum duty cycle of ca. 94% to achieve minimal line
current gaps.
PWM Section
The PWM section is equipped with improved current mode control containing effective
slope compensation as well as enhanced spike suppression in contrast to the commonly
used leading edge current blanking. This is achieved by the chain of operational amplifier
V
R
OP3, voltage source
and the 1st order low pass filter composed of
and an external
1
1
capacitor, which is connected to pin 15 (PWM RMP). For crosstalk suppression between
PFC and PWM section a signal-to-noise ratio comparable to voltage mode controlled
PWM’s is set by operational amplifier OP3 performing a fivefold amplification of the PWM
load current, which is sensed by an external shunt resistor. In order to simultaneously
perform effective slope compensation and to suppress leading spikes, which are due to
parasitic capacitances being discharged whenever the power transistor is switched on,
V
the resulting signal is subsequently increased by the constant voltage of
and finally
1
fed into the 1st order low pass filter. The peak ramp voltage, that in this way can be
reached, amounts to ca. 6.5 V. By combination of voltage source
V
and the following
1
low pass filter a basic ramp (step response) with a leading notch is created, which will
fully compensate a leading spike (see Figure 12) provided, the external capacitor at
pin 15 (PWM RMP) and the external current sensing shunt resistor are scaled properly.
Version 2.0
10
28 Feb 2000