ISP1581BD,551 NXP Semiconductors, ISP1581BD,551 Datasheet - Page 34
ISP1581BD,551
Manufacturer Part Number
ISP1581BD,551
Description
Manufacturer
NXP Semiconductors
Datasheet
1.ISP1581BD551.pdf
(80 pages)
Specifications of ISP1581BD,551
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
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Philips Semiconductors
Table 33:
9397 750 13462
Product data
Bit
Symbol
Reset
Bus reset
Access
Bit
Symbol
Reset
Bus reset
Access
Bit
Symbol
Reset
Bus Reset
Access
Bit
Symbol
Reset
Bus Reset
Access
DMA Configuration register: bit allocation
reserved
XFER_
DIS_
CNT
R/W
R/W
15
7
0
0
-
-
15
9.4.3 DMA Configuration register (address: 38H)
7
IGNORE_
Table 32:
This register defines the DMA configuration for the Generic DMA (GDMA) and the
Ultra-DMA (UDMA) modes. The DMA Configuration register consists of 2 bytes. The
bit allocation is given in
Bit
31 to 24
23 to 16
15 to 8
7 to 0
IORDY
R/W
14
0
0
6
14
6
DMA Transfer Counter register: bit description
BURST[2:0]
Symbol
DMACR4,
DMACR[31:24]
DMACR3,
DMACR[23:16]
DMACR2,
DMACR[15:8]
DMACR1,
DMACR[7:0]
MODE
ATA_
R/W
R/W
00H
00H
13
0
0
5
Rev. 06 — 23 December 2004
13
5
Table
DMACR2 = DMACR[15:8]
DMACR1 = DMACR[7:0]
DMA_MODE[1:0]
12
4
Description
DMA transfer counter byte 4 (MSB)
DMA transfer counter byte 3
DMA transfer counter byte 2
DMA transfer counter byte 1 (LSB)
12
4
33.
R/W
00H
00H
R/W
R/W
00H
00H
00H
00H
11
3
11
3
MODE[1:0]
R/W
00H
00H
Hi-Speed USB peripheral controller
10
2
10
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
2
PIO_MODE[2:0]
reserved
R/W
R/W
00H
00H
9
1
-
-
9
1
ISP1581
WIDTH
R/W
8
0
1
1
33 of 79
8
0
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