UPD720114K9-4E4-A Renesas Electronics America, UPD720114K9-4E4-A Datasheet - Page 26

• Manufacturer Part Number: UPD720114K9-4E4-A
• Manufacturer: Renesas Electronics America

Specifications of UPD720114K9-4E4-A

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Timing Diagram
24
Downstream
Port of Hub
Upstream
End of
Cable
V
V
SS
SS
A. Downstream Hub Delay with Cable
Host or
Hub
Upstream end of cable
Figure 2-11. Hub Differential Delay, Differential Jitter, and SOP Distortion
Hub Differential Jitter:
Bit after SOP Width Distortion (same as data jitter for SOP and next J transition):
Low-speed timings are determined in the same way for:
t
t
t
t
HDJ1
HDJ2
FSOP
LHDD
, t
Downstream
= t
= t
= t
50% Point of
Hub Delay
Initial Swing
LDHJ1
Upstream Port
HDDx
HDDx
End of Cable
Downstream
HDDx
Port of Hub
t
HDD1
C. Upstream Hub Delay with or without Cable
, t
(J) − t
(J) − t
(next J) − t
or
LDJH2
V
V
SS
SS
Upstream port
HDDx
HDDx
, t
Downstream signaling
Upstream signaling
LUHJ1
(K) or t
(J) or t
HDDx
D. Measurement Points
, t
Data Sheet S17462EJ6V0DS
LUJH2
(SOP)
HDDx
HDDx
, and t
(K) − t
(K) − t
Crossover
Hub Delay
Upstream
Point
LSOP
Downstream
t
t
HDDx
Port of Hub
Port of Hub
HDD1
HDD2
HDDx
Upstream
Hub
(K) Paired Transitions
(J) Consecutive Transitions
B. Downstream Hub Delay without Cable
V
V
SS
SS
Downstream port
Crossover
Point
Downstream
Hub Delay
Crossover
Point
t
Plug
HDD2
Receptacle
Function
50% Point of
μ
Initial Swing
PD720114