NH82801IB S LA9M Intel, NH82801IB S LA9M Datasheet - Page 23

• Manufacturer Part Number: NH82801IB S LA9M
• Manufacturer: Intel

Specifications of NH82801IB S LA9M

• Lead Free Status / RoHS Status: Compliant

Documentation Changes
12.
Specification Update
GPIO[5:2]
Name
Update the following ball designation for ICH9M-SFF package ball AC22 in Figure 6-6
and Table 6-3
Figure 6-6 Intel-SFF Ballout(Top view-Right Side)
Table 6-3 ICH9M-SFF Ballout by Signal Name - (Mobile Only)
Remove Preliminary from the title of Figure 6-5 and Figure 6-6:
Figure 6-5. Intel® ICH9M SFF Ballout(Top View-Left Side)
Figure 6-6. Intel® ICH9M SFF Ballout(Top View-Right Side)
Correct Typo for Table 2-22 General Purpose I/O Signals for
GPIO[5:2]
Indicate the proper Note for GPIO[5:2] in Table 2-2 General Purpose I/O Signals for
GPIO[5:2] in the Datasheet.
NOTES:
1.
2.
3.
4.
5.
6.
CPUPWR
Names
TP12
TP12
VSS
GD
22
All GPIOs can be configured as either input or output.
GPI[15:0] can be configured to cause a SMI# or SCI. Note that a GPI can be routed to
either an SMI# or an SCI, but not both.
Some GPIOs exist in the VccSus3_3 power plane. Care must be taken to make sure GPIO
signals are not driven high into powered-down planes. Also, external devices should not be
driving powered down GPIOs high. Some ICH9 GPIOs may be connected to pins on devices
that exist in the core well. If these GPIOs are outputs, there is a danger that a loss of core
power (PWROK low) or a Power Button Override event will result in the Intel ICH9 driving a
pin to a logic 1 to another device that is powered down.
The functionality that is multiplexed with the GPIO may not be utilized in desktop
configuration.
This GPIO is not an open-drain when configured as an output.
SPI_CS1#
Type
I/OD
THRMTR
IGNNE#
DPRSTP
Tolerance
IP#
and CLGPIO6 (Digital Office Only) are
23
#
5 V
Ball
AC22
DPSLP#
INTR
VSS
Power
24
Well
Core
STPCLK
FERR# AD
Default
VSS
25
#
GPI
AC
AE
located in the VccCL3_3 well.
Description
Multiplexed with PIRQ[H:E]# (Note 7 ).
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