NH82801IB S LA9M Intel, NH82801IB S LA9M Datasheet - Page 17

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NH82801IB S LA9M

Manufacturer Part Number
NH82801IB S LA9M
Description
Manufacturer
Intel
Datasheet

Specifications of NH82801IB S LA9M

Lead Free Status / RoHS Status
Compliant
Errata
Workaround: A BIOS code change has been identified.
Status:
14.
Problem:
Implication:
Workaround: None
Status:
15.
Problem:
Implication:
Workaround: A workaround is available.
Status:
Specification Update
ICH9, ICH9R, ICH9DH, ICH9DO:
PCI Express Port [1:6] with a PCI Express device attached may remain in L0 State.
No Fix. For steppings affected, see the Summary Table of Changes.
Intel® I/O Controller Hub 9 (ICH9) Family SATA SYNC Escape
When a SYNC Escape by a SATA device occurs on a D2H FIS, the ICH9 does not set the
PxIS.IFS bit to ‘1.’ This deviates from section 6.1.9 of the Rev 1.3 Serial ATA Advanced
Host Controller Interface (AHCI)
There is no known observable impact. Instead of detecting the IFS bit, software will
detect a timeout error caused by the SYNC escape and then respond
No Fix. For steppings affected, see the Summary Table of Changes.
Intel® I/O Controller Hub 9 (ICH9) Family HPET Write Timing
A read transaction that immediately follows a write transaction to the HPET
TIMn_COMP Timer 0 (108h), HPET MAIN_CNT (0F0h), or TIMn_CONF.bit 6 (100h) may
return an incorrect value
There are no known functional implications with known software and operating
systems.
For the HPET TIMn_COMP Timer 0 Comparator Value Register and HPET
MAIN_CNT—Main Counter Value Register the issue could result in the software
receiving stale data. This may result in undetermined system behavior.
Note: Timers [1:7] are not affected by this issue
For TIMERn_VAL_SET_CNF bit 6 in the TIMn_CONF—Timer n Configuration there is no
known usage model for reading this bit and there are no known functional implications.
No Fix. For steppings affected, see the Summary Table of Changes.
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