W83697HG-TR Nuvoton Technology Corporation of America, W83697HG-TR Datasheet - Page 73

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W83697HG-TR

Manufacturer Part Number
W83697HG-TR
Description
Manufacturer
Nuvoton Technology Corporation of America
Datasheet

Specifications of W83697HG-TR

Lead Free Status / RoHS Status
Supplier Unconfirmed
7.5 Logical Device 0 (FDC)
CR30 (Default 0x01 if PNPCSV = 0 during POR, default 0x00 otherwise)
CR60, CR 61 (Default 0x03, 0xf0 if PNPCSV = 0 during POR, default 0x00, 0x00 otherwise)
CR70 (Default 0x06 if PNPCSV = 0 during POR, default 0x00 otherwise)
CR74 (Default 0x02 if PNPCSV = 0 during POR, default 0x04 otherwise)
CRF0 (Default 0x0E)
FDD Mode Register
Bit 7 - 1: Reserved.
Bit 0: = 1 Activates the logical device.
These two registers select FDC I/O base address [0x100:0xFF8] on 8 byte boundary.
Bit 7 - 4: Reserved.
Bit 3 - 0: These bits select IRQ resource for FDC.
Bit 7 - 3: Reserved.
Bit 2 - 0: These bits select DRQ resource for FDC.
Bit 7: FIPURDWN
This bit controls the internal pull-up resistors of the FDC input pins RDATA, INDEX, TRAK0,
DSKCHG, and WP.
Bit 6: INTVERTZ
This bit determines the polarity of all FDD interface signals.
Bit 5: DRV2EN (PS2 mode only)
When this bit is a logic 0, indicates a second drive is installed and is reflected in status register A.
= 0 Logical device is inactive.
= 0x00 DMA0
= 0x01 DMA1
= 0x02 DMA2
= 0x03 DMA3
= 0x04 - 0x07 No DMA active
= 0
= 1
= 0
= 1
The internal pull-up resistors of FDC are turned on.(Default)
The internal pull-up resistors of FDC are turned off.
FDD interface signals are active low.
FDD interface signals are active high.
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W83697HF/ HG

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