FDC37C669-MS Standard Microsystems (SMSC), FDC37C669-MS Datasheet - Page 87

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FDC37C669-MS

Manufacturer Part Number
FDC37C669-MS
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of FDC37C669-MS

Pin Count
100
Lead Free Status / RoHS Status
Compliant

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The FDC37C669 incorporates
compatible parallel port. The FDC37C669 supports the
optional PS/2 type bi-directional parallel port (SPP), the
Enhanced Parallel Port (EPP) and the Extended
Capabilities Port (ECP) parallel port modes. Refer to the
FDC37C669 Configuration Registers and FDC37C669
Hardware Configuration description for information on
disabling, power down, changing the base address of the
parallel port, and selecting the mode of operation.
DATA PORT
STATUS PORT
CONTROL PORT
EPP ADDR PORT
The bit map of these registers is:
Note 1: These registers are available in all modes.
Note 2: These registers are only available in EPP mode.
Note 3: For EPP mode, IOCHRDY must be connected to the ISA bus.
DATA PORT
STATUS
PORT
CONTROL
PORT
EPP ADDR
PORT
EPP DATA
PORT 0
EPP DATA
PORT 1
EPP DATA
PORT 2
EPP DATA
PORT 3
STROBE AUTOFD
TMOUT
PD0
PD0
PD0
PD0
PD0
PD0
BASE ADDRESS + 00H
BASE ADDRESS + 01H
BASE ADDRESS + 02H
BASE ADDRESS + 03H
D0
an
PD1
PD1
PD1
PD1
PD1
PD1
D1
0
IBM
nINIT
PD2
PD2
PD2
PD2
PD2
PD2
D2
0
PARALLEL PORT
XT/AT
nERR
PD3
SLC
PD3
PD3
PD3
PD3
PD3
D3
87
The FDC37C669 also incorporates SMSC's ChiProtect
circuitry, which prevents possible damage to the parallel
port due to printer power-up.
The functionality of the Parallel Port is achieved through
the
associated registers and control gating. The control and
data port are read/write by the CPU, the status port is
read/write in the EPP mode. The address map of the
Parallel Port is shown below:
EPP DATA PORT 0
EPP DATA PORT 1
EPP DATA PORT 2
EPP DATA PORT 3
SLCT
IRQE
PD4
PD4
PD4
PD4
PD4
PD4
D4
use
of
PCD
PD5
PD5
PD5
PD5
PD5
PD5
PE
D5
eight
nACK
PD6
PD6
PD6
PD6
PD6
PD6
addressable
D6
BASE ADDRESS + 04H
BASE ADDRESS + 05H
BASE ADDRESS + 06H
BASE ADDRESS + 07H
0
nBUSY
PD7
AD7
PD7
PD7
PD7
PD7
D7
0
ports, with their
Note
2,3
2,3
2,3
2,3
2,3
1
1
1

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