FDC37B727-NS Standard Microsystems (SMSC), FDC37B727-NS Datasheet - Page 229
FDC37B727-NS
Manufacturer Part Number
FDC37B727-NS
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.FDC37B727-NS.pdf
(238 pages)
Specifications of FDC37B727-NS
Pin Count
128
Lead Free Status / RoHS Status
Compliant
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Note 1: The data is held until BUSY goes inactive or for time t3, whichever is longer. This only applies if
nSTROBE
NAME
t1
t2
t3
t4
t5
t6
PDATA
BUSY
another data transfer is pending. If no other data transfer is pending, the data is held indefinitely.
DATA Valid to nSTROBE Active
nSTROBE Active Pulse Width
DATA Hold from nSTROBE Inactive (Note 1)
nSTROBE Active to BUSY Active
BUSY Inactive to nSTROBE Active
BUSY Inactive to PDATA Invalid (Note 1)
FIGURE 28 - PARALLEL PORT FIFO TIMING
TABLE 96 - PARALLEL PORT FIFO TIMING
DESCRIPTION
t1
230
t4
t2
MIN
600
600
450
680
80
t3
TYP
t6
t5
MAX
500
UNITS
ns
ns
ns
ns
ns
ns
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