FDC37B727-NS Standard Microsystems (SMSC), FDC37B727-NS Datasheet - Page 170
FDC37B727-NS
Manufacturer Part Number
FDC37B727-NS
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.FDC37B727-NS.pdf
(238 pages)
Specifications of FDC37B727-NS
Pin Count
128
Lead Free Status / RoHS Status
Compliant
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I/O Base Address Configuration Register
LOGICAL
NUMBER
DEVICE
0x00
0x03
0x04
0x05
0x07
0x08
Serial Port 1
Serial Port 2
LOGICAL
DEVICE
AUX I/O
(Note 4)
Parallel
KYBD
FDC
Port
Table 65 - I/O Base Address Configuration Register Description
REGISTER
0x60,0x61
0x60,0x61
0x60,0x61
0x60,0x61
INDEX
n/a
n/a
when the base address
(all modes supported,
(EPP Not supported)
EPP is only available
Fixed Base Address:
[0x100:0x0FFC]
Not Relocatable
Not Relocatable
[0x100:0x0FF8]
[0x100:0x0FF8]
[0x100:0x0FF8]
[0x100:0x0FF8]
BOUNDARIES
BOUNDARIES
BOUNDARIES
BOUNDARIES
BOUNDARIES
is on an 8-byte
ON 8 BYTE
ON 4 BYTE
ON 8 BYTE
ON 8 BYTE
ON 8 BYTE
BASE I/O
boundary)
(NOTE3)
RANGE
171
60,64
or
+0 : SRA
+1 : SRB
+2 : DOR
+3 : TSR
+4 : MSR/DSR
+5 : FIFO
+7 : DIR/CCR
+0 : Data|ecpAfifo
+1 : Status
+2 : Control
+3 : EPP Address
+4 : EPP Data 0
+5 : EPP Data 1
+6 : EPP Data 2
+7 : EPP Data 3
+400h : cfifo|ecpDfifo|tfifo |cnfgA
+401h : cnfgB
+402h : ecr
+0 : RB/TB|LSB div
+1 : IER|MSB div
+2 : IIR/FCR
+3 : LCR
+4 : MSR
+5 : LSR
+6 : MSR
+7 : SCR
+0 : RB/TB|LSB div
+1 : IER|MSB div
+2 : IIR/FCR
+3 : LCR
+4 : MSR
+5 : LSR
+6 : MSR
+7 : SCR
+0 : Data Register
+4 : Command/Status Reg.
n/a
BASE OFFSETS
FIXED
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