FDC37C665GT-MS Standard Microsystems (SMSC), FDC37C665GT-MS Datasheet - Page 13
FDC37C665GT-MS
Manufacturer Part Number
FDC37C665GT-MS
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.FDC37C665GT-MS.pdf
(152 pages)
Specifications of FDC37C665GT-MS
Pin Count
100
Lead Free Status / RoHS Status
Compliant
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Quantity
Price
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Part Number:
FDC37C665GT-MS
Manufacturer:
Microchip Technology
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PIN NO.
84,86
94
nRing Indicator
Drive 2
nADRx
Parallel Port
Interrupt
Request 2
NAME
DESCRIPTION OF PIN FUNCTIONS
nRI1, nRI2
DRV2
nADRx
PINTR2
ECPEN
SYMBOL
PARALLEL PORT INTERFACE
BUFFER
TYPE
O24
O24
I
I
I
13
Active low Ring Indicator input for primary
and secondary serial ports.
signal which notifies the UART that the
telephone ring signal is detected by the
modem. The CPU can monitor the status of
nRI signal by reading bit 6 of Modem Status
Register (MSR). A nRI signal state change
from low to high after the last MSR read will
set MSR bit 2 to a 1. If bit 3 of Interrupt
Enable Register is set, the interrupt is
generated when nRI changes state. Note:
Bit 6 of MSR is the complement of nRI.
In PS/2 mode, this input indicates whether a
second drive is connected; DRV2 should be
low if a second drive is connected.
status is reflected in a read of Status
Register
FDC37C665GT.
driven in the FDC37C666GT)
Optional I/O port address decode output.
Refer to Configuration registers CR3, CR8
and CR9 for more information. Active low.
(Available
FDC37C666GT.) Defaults to tri-state after
power-up. This pin has a 30 a internal pull-
up.
This interrupt from the Parallel Port is
enabled/disabled via bit 4 of the Parallel
Port
configuration registers CR1 and CR3 for
more information.
FDC37C666GT (Adapter Mode): Enhanced
Parallel
FDC37C666GT hardware configuration for
more information. Read and latched during
reset active.
Control
Port
A.
in
DESCRIPTION
mode
Register.
(Only
This pin must not be
FDC37C665GT
select.
available
Handshake
Refer
Refer
This
and
to
to
in
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