HCPL-0721-300 Avago Technologies US Inc., HCPL-0721-300 Datasheet - Page 9
![](/photos/31/35/313537/516-8-soic_sml.jpg)
HCPL-0721-300
Manufacturer Part Number
HCPL-0721-300
Description
Manufacturer
Avago Technologies US Inc.
Datasheet
1.HCPL-0721-300.pdf
(19 pages)
Specifications of HCPL-0721-300
Number Of Elements
1
Output Current
10mA
Package Type
SOIC
Operating Temp Range
-40C to 85C
Power Dissipation
150mW
Propagation Delay Time
40ns
Pin Count
8
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Output Type
Push-Pull
Isolation Voltage
3750Vrms
Lead Free Status / RoHS Status
Not Compliant
Package Characteristics
Input-Output Momentary
Withstand Voltage
Resistance
(Input-Output)
Capacitance
(Input-Output)
Input Capacitance
Input IC Junction-to-Case
Thermal Resistance
Output IC Junction-to-Case
Thermal Resistance
Package Power Dissipation
Notes:
1. Absolute Maximum ambient operating temperature means the device will not be damaged if operated under these conditions. It does not
2. The LED is ON when V
3. t
4. PWD is defined as |t
5. t
6. CM
7. Unloaded dynamic power dissipation is calculated as follows: C
8. Device considered a two-terminal device: pins 1, 2, 3, and 4 shorted together and pins 5, 6, 7, and 8 shorted together.
9. In accordance with UL1577, each HCPL-072X is proof tested by applying an insulation test voltage ≥4500 V
10. The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous
11. C
Figure 1. Typical output voltage vs. input volt-
age.
9
Parameter
guarantee functionality.
t
the recommended operating conditions.
mode voltage slew rate that can be sustained while maintaining
and falling common mode voltage edges.
current limit, I
current limit. I
voltage rating. For the continuous voltage rating refer to your equipment level safety specification or Avago Application Note 1074 entitled
“Optocoupler Input-Output Endurance Voltage. ”
PHL
PLH
PSK
5
4
3
2
1
0
I
is the capacitance measured at pin 2 (V
0
H
is equal to the magnitude of the worst case difference in t
propagation delay is measured from the 50% level on the falling edge of the V
propagation delay is measured from the 50% level on the rising edge of the V
is the maximum common mode voltage slew rate that can be sustained while maintaining V
1
HCPL-0710 fig 1
I-O
I-O
≤5 µA). Each HCPL-772X is proof tested by applying an insulation test voltage ≥4500 Vrms for 1 second (leakage detection
≤ 5 µA.)
2
V
I
PHL
(V)
I
is low and OFF when V
- t
3
PLH
|. %PWD (percent pulse width distortion) is equal to the PWD divided by pulse width.
0 °C
25 °C
85 °C
4
072X
772X
Option 020
-772X
-072X
-772X
-072X
5
I
).
I
is high.
Figure 2. Typical input voltage switching thresh-
old vs. input supply voltage.
Symbol
V
R
C
C
θ
θ
P
ISO
I-O
jci
jco
PD
I-O
I
2.2
2.1
2.0
1.9
1.8
1.7
1.6
4.5
Min.
3750
3750
5000
4.75
PHL
0 °C
25 °C
85 °C
PD
HCPL-0710 fig 2
and/or t
* V
V
DD2
DD1
Typ.
10
0.6
3.0
145
160
140
135
5
* f + I
12
V
(V)
PLH
O
< 0.8 V . The common mode voltage slew rates apply to both rising
that will be seen between units at any given temperature within
DD
Max.
150
5.25
* V
I
signal to the 50% level of the rising edge of the V
I
signal to the 50% level of the falling edge of the V
DD
, where f is switching frequency in MHz.
Units
Vrms
Ω
pF
°C/W
mW
5.5
Figure 3. Typical propagation delays vs. tem-
perature.
O
Test Conditions
RH ≤50%,
t = 1 min.,
T
V
f = 1 MHz
Thermocouple
located at center
underside of package
> 0.8 V
A
I-O
= 25°C
29
27
25
23
21
19
17
15
= 500 Vdc
0
DD2
RMS
10
. CM
for 1 second (leakage detection
20 30
L
is the maximum common
T
T
HCPL-0710 fig 3
PLH
PHL
T
40
A
(C)
50
Fig.
60
O
70
O
signal.
signal.
Note
8, 9,
10
8
11
80