HCPL-0721-300 Avago Technologies US Inc., HCPL-0721-300 Datasheet - Page 12

HCPL-0721-300

Manufacturer Part Number
HCPL-0721-300
Description
Manufacturer
Avago Technologies US Inc.
Datasheet

Specifications of HCPL-0721-300

Number Of Elements
1
Output Current
10mA
Package Type
SOIC
Operating Temp Range
-40C to 85C
Power Dissipation
150mW
Propagation Delay Time
40ns
Pin Count
8
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Output Type
Push-Pull
Isolation Voltage
3750Vrms
Lead Free Status / RoHS Status
Not Compliant
Pulse-width distortion (PWD) is the difference between
t
rate capability of a transmission system. PWD can be
expressed in percent by dividing the PWD (in ns) by the
minimum pulse width (in ns) being transmitted. Typical-
ly, PWD on the order of 20 - 30% of the minimum pulse
width is tolerable.
Propagation delay skew, t
to consider in parallel data applications where synchro-
nization of signals on parallel data lines is a concern. If
the parallel data is being sent through a group of opto-
couplers, differences in propagation delays will cause the
data to arrive at the outputs of the optocouplers at differ-
ent times. If this difference in propagation delay is large
enough it will determine the maximum rate at which
parallel data can be sent through the optocouplers.
Figure 13. Propagation delay skew waveform.
12
Propagation delay skew represents the uncertainty of
where an edge might be after being sent through an op-
tocoupler. Figure 14 shows that there will be uncertainty
in both the data and clock lines. It is important that these
two areas of uncertainty not overlap, otherwise the clock
signal might arrive before all of the data outputs have
settled, or some of the data outputs may start to change
before the clock signal has arrived. From these consider-
ations, t he a bsolute m inimum p ulse w idth t hat c an b e s ent
through o ptocouplers i n a p arallel a pplication i s t wice t
PHL
and t
V
V
V
V
O
O
I
I
PLH
and often determines the maximum data
50%
50%
HCPL-0710 fig 14
CMOS
2.5 V,
PSK
t
PSK
, is an important parameter
2.5 V,
CMOS
PSK
.
Propagation delay skew is defined as the difference be-
tween the minimum and maximum propagation delays,
either t
which are operating under the same conditions (i.e., the
same drive current, supply voltage, output load, and op-
erating temperature). As illustrated in Figure 13, if the in-
puts of a group of optocouplers are switched either ON
or OFF at the same time, t
the shortest propagation delay, either t
the longest propagation delay, either t
As mentioned earlier, t
parallel data transmission rate. Figure 14 is the timing
diagram of a typical parallel data application with both
the clock and data lines being sent through the opto-
couplers. The figure shows data and clock signals at the
inputs and outputs of the optocouplers. In this case the
data is assumed to be clocked off of the rising edge of
the clock.
Figure 14. Parallel data transmission example.
A cautious design should use a slightly longer pulse
width to ensure that any additional uncertainty in the
rest of the circuit does not cause a problem.
The HCPL-772X/072X optocouplers offer the advantage
of guaranteed specifications for propagation delays,
pulse-width distortion, and propagation delay skew
over the recommended temperature and power supply
ranges.
INPUTS
OUTPUTS
CLOCK
CLOCK
DATA
DATA
PLH
or t
PHL
t
PSK
, for any given group of optocouplers
HCPL-0710 fig 15
PSK
t
PSK
can determine the maximum
PSK
is the difference between
PLH
PLH
or t
or t
PHL
.
PHL
, and

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