TDA9886T/V5-T NXP Semiconductors, TDA9886T/V5-T Datasheet - Page 12
TDA9886T/V5-T
Manufacturer Part Number
TDA9886T/V5-T
Description
Manufacturer
NXP Semiconductors
Datasheet
1.TDA9886TV5-T.pdf
(51 pages)
Specifications of TDA9886T/V5-T
Lead Free Status / RoHS Status
Compliant
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NXP Semiconductors
TDA9885_TDA9886_3
Product data sheet
9.2.1 Subaddress (A data)
9.2.2 Data byte for switching mode (B data)
If more than one data byte is transmitted, then auto-increment is performed: starting from
the transmitted subaddress and auto-increment of subaddress in accordance with the
order of
Table 9.
X = don’t care.
[1]
[2]
Table 10.
[1]
Register
SAD for switching mode 0
SAD for adjust mode
SAD for data mode
Bit
7
6
5
4 and 3
2
1
0
Bit A7 = 1 is not allowed.
Bits A6 to A2 will be ignored by the internal hardware.
For positive AM TV choose 6.5 MHz for the second SIF.
Table
Definition of the subaddress (second byte after slave address)
Bit description of SAD register for switching mode (SAD = 00)
Symbol
B7
B6
B5
B[4:3]
B2
B1
B0
9.
I
2
C-bus controlled multistandard alignment-free IF-PLL demodulators
Rev. 03 — 16 December 2008
Description
output port 2 for SAW switching or monitoring
output port 1 for SAW switching or external input
forced audio mute
TV standard modulation
carrier mode
auto mute of FM AF output
video mode (sound trap)
MSB
A7
0
0
1 = high-impedance, disabled or HIGH
0 = low-impedance, active or LOW
1 = high-impedance, disabled or HIGH
0 = low-impedance, active or LOW
1 = on
0 = off
00 = positive AM TV
01 = not used
10 = negative FM TV
11 = not used
1 = QSS mode
0 = intercarrier mode
1 = active
0 = inactive
1 = sound trap bypass
0 = sound trap active
[1]
A6
X
X
X
[2]
A5
X
X
X
[2]
[1]
TDA9885; TDA9886
A4
X
X
X
[2]
A3
X
X
X
[2]
A2
X
X
X
[2]
© NXP B.V. 2008. All rights reserved.
A1
0
0
1
LSB
A0
0
1
0
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