CY7C265-15QMB Cypress Semiconductor Corp, CY7C265-15QMB Datasheet - Page 5

• Manufacturer Part Number: CY7C265-15QMB
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C265-15QMB

• Density: 64Kb
• Organization: 8Kx8
• Operating Current: 140mA
• Interface Type: Parallel
• Package Type: LCC
• Operating Temperature Classification: Military
• Operating Supply Voltage (typ): 5V
• Operating Temp Range: -55C to 125C
• Pin Count: 28
• Mounting: Surface Mount
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Lead Free Status / RoHS Status: Not Compliant

Switching Waveform
Erasure Characteristics
Wavelengths of light less than 4000 angstroms begin to erase
the 7C265 in the windowed package. For this reason, an
opaque label should be placed over the window if the PROM
is exposed to sunlight or fluorescent lighting for extended pe-
riods of time.
The recommended dose of ultraviolet light for erasure is a
wavelength of 2537 angstroms for a minimum dose (UV inten-
sity • exposure time) of 25 Wsec/cm
with a 12 mW/cm
approximately 45 minutes. The 7C265 needs to be within one
inch of the lamp during erasure. Permanent damage may re-
sult if the PROM is exposed to high-intensity UV light for an
extended period of time. 7258 Wsec/cm
maximum dosage.
Programming Modes
The 7C265 offers a limited selection of programmed architec-
tures. Programming these features should be done with a sin-
gle 10-ms-wide pulse in place of the intelligent algorithm,
mainly because these features are verified operationally, not
with the VFY pin. Architecture programming is implemented by
applying the supervoltage to two additional pins during pro-
gramming. In programming the 7C265 architecture, VPP is
applied to pins 3, 9, and 22. The choice of a particular mode
depends on the states of the other pins during programming,
ASYNCHRONOUS INIT
(PROGRAMMABLE)
(PROGRAMMABLE)
ASYNCHRONOUS
SYNCHRONOUS
ADDRESS
OUTPUT
ENABLE
ENABLE
CLOCK
2
power rating the exposure time would be
t
DI
t
SES
t
PWI
VALID DATA
2
. For an ultraviolet lamp
2
is the recommended
t
HES
t
RI
t
PWC
t
HZC
t
AS
5
Bit Map Data
Control Byte
so it is important that the condition of the other pins be met as
set forth in the mode table. The considerations that apply with
respect to power-up and power-down during intelligent pro-
gramming also apply during architecture programming. Once
the supervoltages have been established and the correct logic
states exist on the other device pins, programming may begin.
Programming is accomplished by pulling PGM from HIGH to
LOW and then back to HIGH with a pulse width equal to 10 ms.
00 Asynchronous output enable (default condition)
01 Synchronous output enable
02 Asynchronous initialize
Programmer Address (Hex.)
Decimal
8191
8192
8193
t
t
COS
AH
0
.
.
1FFF
2000
2001
Hex
t
0
.
.
HZE
t
CO
Control Byte
RAM Data
Contents
INIT Byte
Data
Data
CY7C265
.
.
t
DOE
C265–7