CY7C265-25QMB Cypress Semiconductor Corp, CY7C265-25QMB Datasheet

CY7C265-25QMB

Manufacturer Part Number

CY7C265-25QMB

Description

Manufacturer

Cypress Semiconductor Corp

Datasheet

1.CY7C265-25QMB.pdf (10 pages)

Specifications of CY7C265-25QMB

Density

64Kb

Organization

8Kx8

Operating Current

140mA

Interface Type

Parallel

Package Type

LCC

Operating Temperature Classification

Military

Operating Supply Voltage (typ)

Operating Temp Range

-55C to 125C

Pin Count

Mounting

Surface Mount

Operating Supply Voltage (min)

4.5V

Operating Supply Voltage (max)

5.5V

Lead Free Status / RoHS Status

Not Compliant

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Features

Functional Description

The CY7C265 is a 8192 x 8 registered PROM. It is organized

as 8,192 words by 8 bits wide, and has a pipeline output reg-

ister. In addition, the device features a programmable initialize

byte that may be loaded into the pipeline register with the ini-

tialize signal. The programmable initialize byte is the 8,193rd

byte in the PROM and its value is programmed at the time of

use.

Packaged in 28 pins, the PROM has 13 address signals (A

through A

or initialize), and CLOCK.

CLOCK functions as a pipeline clock, loading the contents of

the addressed memory location into the pipeline register on

each rising edge. The data will appear on the outputs if they

are enabled. One pin on the CY7C265 is programmed to per-

form either the enable or the initialize function.

Cypress Semiconductor Corporation

• CMOS for optimum speed/power

• High speed (commercial and military)

• Low power

• On-chip edge-triggered registers

• EPROM technology

• 5V 10% V

• Capable of withstanding >2001V static discharge

• Slim 28-pin, 300-mil plastic or hermetic DIP

— 15 ns address set-up

— 12 ns clock to output

— 660 mW (commercial)

— 770 mW (military)

— Ideal for pipelined microprogrammed systems

— 100% programmable

— Reprogrammable (7C265W)

), 8 data out signals (O

, commercial and military

through O

•

3901 North First Street

), E/I (enable

If the asynchronous enable (E) is being used, the outputs may

be disabled at any time by switching the enable to a logic

HIGH, and may be returned to the active state by switching the

enable to a logic LOW.

If the synchronous enable (ES) is being used, the outputs will

go to the OFF or high-impedance state upon the next positive

clock edge after the synchronous enable input is switched to

a HIGH level. If the synchronous enable pin is switched to a

logic LOW, the subsequent positive clock edge will return the

output to the active state. Following a positive clock edge, the

address and synchronous enable inputs are free to change

since no change in the output will occur until the next

LOW-to-HIGH transition of the clock. This unique feature al-

lows the CY7C265 decoders and sense amplifiers to access

the next location while previously addressed data remains sta-

ble on the outputs.

If the E/I pin is used for INIT (asynchronous), then the outputs

are permanently enabled. The initialize function is useful dur-

ing power-up and time-out sequences, and can facilitate im-

plementation of other sophisticated functions such as a built-in

“jump start” address. When activated, the initialize control in-

put causes the contents of a user programmed 8193rd 8-bit

word to be loaded into the on-chip register. Each bit is pro-

grammable and the initialize function can be used to load any

desired combination of 1’s and 0’s into the register. In the un-

programmed state, activating INIT will generate a register

clear (all outputs LOW). If all the bits of the initialize word are

programmed to be a 1, activating INIT performs a register pre-

set (all outputs HIGH).

Applying a LOW to the INIT input causes an immediate load

of the programmed initialize word into the pipeline register and

onto the outputs. The INIT LOW disables clock and must re-

turn HIGH to enable clock independent of all other inputs, in-

cluding the clock.

•

8K x 8 Registered PROM

San Jose

•

CA 95134

April 1988 – Revised April 1995

•

CY7C265

408-943-2600

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CY7C265-25QMB Summary of contents

Page 1

... Capable of withstanding >2001V static discharge • Slim 28-pin, 300-mil plastic or hermetic DIP Functional Description The CY7C265 is a 8192 x 8 registered PROM organized as 8,192 words by 8 bits wide, and has a pipeline output reg- ister. In addition, the device features a programmable initialize byte that may be loaded into the pipeline register with the ini- tialize signal ...

Page 2

... Mil 140 Static Discharge Voltage ........................................... >2001V (per MIL-STD-883, Method 3015) Latch-Up Current ..................................................... >200 mA Operating Range Range Commercial Industrial [2] Military Notes: 1. Contact a Cypress representative for industrial temperature range spec- ifications the “instant on” case temperature CY7C265 Pin Configurations DIP/Flatpack Top View ...

Page 3

... CC Output Disabled V = Max GND CC OUT V = Max Com’l CC OUT Mil 12 3.0 Test Conditions MHz 5. CY7C265 25 7C265–40 7C265–50 Max. Min. Max. Min. Max. Unit 2.4 2.4 0.4 0.4 0.4 0.4 0.4 2.0 2.0 0.8 0.8 0.8 +10 –10 +10 –10 +10 +40 –40 +40 – ...

Page 4

... INCLUDING JIG AND SCOPE C269–4 (b) High Z Load MIL R1 250 167 INCLUDING JIG AND C269–6 SCOPE (d) High Z Load [3, 5] 7C265–15 7C265–25 Min. Max. Min CY7C265 3.0V 90% 90% 10% GND 5 ns 7C265–40 7C265–50 Max. Min. Max. Min. Max ...

Page 5

... Once the supervoltages have been established and the correct logic states exist on the other device pins, programming may begin. Programming is accomplished by pulling PGM from HIGH to LOW and then back to HIGH with a pulse width equal to 10 ms. 5 CY7C265 DOE t HZE C265– ...

Page 6

... VFY 1314151617 C265–8 Figure 1. Programming Pinout programming information, including a listing of software pack- ages, please see the PROM Programming Information located at the end of this section. Programming algorithms can be ob- tained from any Cypress representative. 6 CY7C265 Pin Function – – – ...

Page 7

... OUTPUT VOLTAGE (V) NORMALIZED SUPPLY CURRENT vs. CLOCK PERIOD 1.05 1.00 V =5.5V CC 0. 0.90 0.85 0.80 0.75 0. 100 CLOCK PERIOD (ns) 7 CY7C265 OUTPUT SOURCE CURRENT vs. OUTPUT VOLTAGE 0.0 1.0 2.0 3.0 4.0 OUTPUT VOLTAGE (V) TYPICAL ACCESS TIME CHANGE vs. OUTPUT LOADING =4.5V ...

Page 8

... CY7C265–25LMB CY7C265–25QMB CY7C265–25WMB 40 100 CY7C265–40JC CY7C265–40PC CY7C265–40WC 50 80 CY7C265–50JC CY7C265–50PC CY7C265–50WC 120 CY7C265–50DMB CY7C265–50LMB CY7C265–50QMB CY7C265–50WMB Note: 6. Most of these products are available in industrial temperature range. Contact a Cypress representative for specifications and product availability ...

Page 9

... Package Diagrams 28-Lead (300-Mil) CerDIP D22 MIL–STD–1835 D–15 Config. A 28-Square Leadless Chip Carrier L64 MIL–STD–1835 C–4 28-Lead Plastic Leaded Chip Carrier J64 28-Pin Windowed Leadless Chip Carrier Q64 MIL–STD–1835 C–4 9 CY7C265 ...

Page 10

... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. 28-Lead (300-Mil) Molded DIP P21 28-Lead (300-Mil) Windowed CerDIP W22 MIL–STD–1835 D– 15 Config. A CY7C265 ...

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