STK22C48-WF25 Cypress Semiconductor Corp, STK22C48-WF25 Datasheet

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STK22C48-WF25

Manufacturer Part Number
STK22C48-WF25
Description
Manufacturer
Cypress Semiconductor Corp
Type
NVSRAMr
Datasheet

Specifications of STK22C48-WF25

Word Size
8b
Organization
2Kx8
Density
16Kb
Interface Type
Parallel
Access Time (max)
25ns
Operating Supply Voltage (typ)
5V
Package Type
PDIP
Operating Temperature Classification
Commercial
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
Operating Temp Range
0C to 70C
Pin Count
28
Mounting
Through Hole
Supply Current
85mA
Lead Free Status / RoHS Status
Compliant
Features
Cypress Semiconductor Corporation
Document Number: 001-51000 Rev. *A
Logic Block Diagram
25 ns and 45 ns access times
Hands off automatic STORE on power down with external 68
µF capacitor
STORE to QuantumTrap™ nonvolatile elements is initiated by
software, hardware, or AutoStore™ on power down
RECALL to SRAM initiated by software or power up
Unlimited Read, Write, and Recall cycles
1,000,000 STORE cycles to QuantumTrap
100 year data retention to QuantumTrap
Single 5V+10% operation
Commercial and industrial temperatures
28-pin 300 mil and (330 mil) SOIC package
RoHS compliance
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
A
A
A
A
A
1
3
7
0
2
4
5
6
6
7
8
5
9
A
0
COLUMN DEC
COLUMN I/O
A
STATIC RAM
1
32 X 512
ARRAY
A
2
A
3
A
198 Champion Court
4
Quantum Trap
A
10
32 X 512
STORE
16 Kbit (2K x 8) AutoStore nvSRAM
RECALL
Functional Description
The Cypress STK22C48 is a fast static RAM with a nonvolatile
element in each memory cell. The embedded nonvolatile
elements incorporate QuantumTrap technology producing the
world’s most reliable nonvolatile memory. The SRAM provides
unlimited read and write cycles, while independent nonvolatile
data resides in the highly reliable QuantumTrap cell. Data
transfers from the SRAM to the nonvolatile elements (the
STORE operation) takes place automatically at power down. On
power up, data is restored to the SRAM (the RECALL operation)
from the nonvolatile memory. A hardware STORE is initiated with
the HSB pin.
San Jose
V
CONTROL
CONTROL
CC
RECALL
POWER
STORE/
,
V
CA 95134-1709
CAP
Revised December 11, 2009
HSB
STK22C48
OE
CE
WE
408-943-2600
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STK22C48-WF25 Summary of contents

Page 1

... Cypress Semiconductor Corporation Document Number: 001-51000 Rev Kbit ( AutoStore nvSRAM Functional Description The Cypress STK22C48 is a fast static RAM with a nonvolatile element in each memory cell. The embedded nonvolatile elements incorporate QuantumTrap technology producing the world’s most reliable nonvolatile memory. The SRAM provides unlimited read and write cycles, while independent nonvolatile data resides in the highly reliable QuantumTrap cell ...

Page 2

... SRAM Read Cycle ......................................................... 8 Switching Waveforms ......................................................... 8 SRAM Write Cycle.......................................................... 9 AutoStore or Power Up RECALL ..................................... 10 Switching Waveform ......................................................... 10 Hardware STORE Cycle .................................................... 11 Switching Waveform ......................................................... 11 Ordering Information......................................................... 12 Part Numbering Nomenclature......................................... 12 Package Diagrams............................................................. 13 Document History Page .................................................... 14 Sales, Solutions, and Legal Information ......................... 14 Worldwide Sales and Design Support.......................... 14 Products ....................................................................... 14 STK22C48 Page [+] Feedback ...

Page 3

... SRAM. In addition, it provides unlimited RECALL opera- tions from the nonvolatile cells and up to one million STORE operations. SRAM Read The STK22C48 performs a Read cycle whenever CE and OE are LOW while WE and HSB are HIGH. The address specified on pins A determines the 2,048 data bytes accessed. When the 0– ...

Page 4

... Write is inhibited until a negative transition detected. This protects against inadvertent writes during power up or brown out conditions. Noise Considerations The STK22C48 is a high speed memory. It must have a high frequency bypass capacitor of approximately 0.1 µF connected between possible. As with all high speed CMOS ICs, careful routing of power, ground, and signals reduce circuit noise ...

Page 5

... HSB STORE operation occurs only if an SRAM Write is done since the last nonvolatile cycle. After the STORE (If any) completes, the part goes into standby mode, inhibiting all operations until HSB rises. Document Number: 001-51000 Rev. *A device drives HSB LOW for the onset of a STORE. When the STK22C48 is connected for AutoStore operation (system V connected ...

Page 6

... –4 mA except HSB OUT except HSB OUT = 3 mA OUT Between V pin and Vss, 6V rated -10%, +20% CAP nom. Description STK22C48 or HSB .......................–0.5V to Vcc + 0.5V 0-7 Ambient Temperature V CC 0°C to +70°C 4.5V to 5.5V -40°C to +85°C 4.5V to 5.5V Min Max Commercial 85 65 ...

Page 7

... 3.0V CC [5] Test Conditions Test conditions follow standard test methods and procedures for measuring thermal impedance, per EIA / JESD51. Figure 5. AC Test Loads 5.0V Output 512Ω STK22C48 Max Unit 28-SOIC 28-SOIC Unit (300 mil) (330 mil) °C/W TBD TBD °C/W ...

Page 8

... Figure 7. SRAM Read Cycle 2: CE and OE Controlled Notes 6. WE and HSB must be High during SRAM Read cycles. 7. Device is continuously selected with CE and OE both Low. 8. Measured ±200 mV from steady state output voltage. Document Number: 001-51000 Rev Description Min [6, 7] [6] STK22C48 45 ns Unit Max Min Max ...

Page 9

... Address Setup to End of Write Address Setup to Start of Write Address Hold After End of Write Write Enable to Output Disable Output Active After End of Write SCE PWE t SD DATA VALID t HZWE HIGH IMPEDANCE SCE PWE t SD DATA VALID HIGH IMPEDANCE STK22C48 Unit Min Max Min Max ...

Page 10

... Document Number: 001-51000 Rev. *A Description ) to HSB Low SWITCH Figure 10. AutoStore/Power Up RECALL . SWITCH . If an SRAM Write has not taken place since the last nonvolatile cycle, HSB is released and no store SWITCH STK22C48 STK22C48 Unit Min Max μs 550 10 ms μs 1 4.0 4 ...

Page 11

... Hardware STORE Pulse Width PHSB HLHX t Hardware STORE Low to STORE Busy HLBL Switching Waveform Note 16 only applicable after t is complete. DHSB STORE Document Number: 001-51000 Rev. *A Description Figure 11. Hardware STORE Cycle STK22C48 STK22C48 Unit Min Max 700 300 ns Page [+] Feedback ...

Page 12

... Part Numbering Nomenclature STK22C48 - Ordering Information These parts are not recommended for new designs. They are in production to support ongoing production programs only. Speed (ns) Ordering Code 25 STK22C48-NF25TR STK22C48-NF25 STK22C48-SF25TR STK22C48-SF25 STK22C48-NF25ITR STK22C48-NF25I STK22C48-SF25ITR STK22C48-SF25I 45 STK22C48-NF45TR STK22C48-NF45 STK22C48-SF45TR STK22C48-SF45 STK22C48-NF45ITR STK22C48-NF45I STK22C48-SF45ITR STK22C48-SF45I All parts are Pb-free ...

Page 13

... MOLD PROTRUSION/END FLASH SHALL NOT EXCEED 0.010 in (0.254 mm) PER SIDE 3. DIMENSIONS IN INCHES 4. PACKAGE WEIGHT 0.85gms * 0.394[10.01] 0.419[10.64] 0.026[0.66] 0.032[0.81] SEATING PLANE 0.092[2.33] 0.105[2.67] 0.004[0.10] * Figure 13. 28-Pin (330 mil) SOIC (51-85058) STK22C48 MIN. MAX. PART # S28.3 STANDARD PKG. SZ28.3 LEAD FREE PKG. 0.0091[0.23] 0.015[0.38] 0.0125[3.17] 0.050[1.27] 51-85026-*D 51-85058-*A Page ...

Page 14

... Document History Page Document Title: STK22C48 16 Kbit ( AutoStore nvSRAM Document Number: 001-51000 Orig. of Rev. ECN No. Change ** 2625139 GVCH/PYRS *A 2826441 GVCH Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at cypress ...

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