M48Z35Y-70MH1TR STMicroelectronics, M48Z35Y-70MH1TR Datasheet - Page 10

• Manufacturer Part Number: M48Z35Y-70MH1TR
• Manufacturer: STMicroelectronics
• Type: NVSRAMr

Specifications of M48Z35Y-70MH1TR

• Word Size: 8b
• Organization: 32Kx8
• Density: 256Kb
• Interface Type: Parallel
• Access Time (max): 70ns
• Operating Supply Voltage (typ): 5V
• Package Type: SOH
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Operating Temp Range: 0C to 70C
• Pin Count: 28
• Mounting: Surface Mount
• Supply Current: 50mA
• Lead Free Status / RoHS Status: Not Compliant

Operating modes
2.2
Figure 6.
Figure 7.
10/24
A0-A14
E
W
DQ0-DQ7
A0-A14
E
W
DQ0-DQ7
WRITE mode
The M48Z35/Y is in the WRITE mode whenever W and E are low. The start of a WRITE is
referenced from the latter occurring falling edge of W or E. A WRITE is terminated by the
earlier rising edge of W or E. The addresses must be held valid throughout the cycle. E or W
must return high for a minimum of t
to the initiation of another READ or WRITE cycle. Data-in must be valid t
end of WRITE and remain valid for t
cycles to avoid bus contention; although, if the output bus has been activated by a low on E
and G, a low on W will disable the outputs t
WRITE enable controlled, WRITE AC waveforms
Chip enable controlled, WRITE AC waveforms
tAVEL
tAVEL
tAVWL
tAVWL
tWLQZ
Doc ID 2608 Rev 9
tAVWH
tAVEH
EHAX
tWLWH
VALID
tAVAV
VALID
tAVAV
WHDX
tELEH
from chip enable or t
afterward. G should be kept high during WRITE
WLQZ
tDVEH
tDVWH
DATA INPUT
after W falls.
DATA INPUT
tWHDX
WHAX
tEHDX
tWHQX
from WRITE enable prior
tEHAX
tWHAX
M48Z35, M48Z35Y
DVWH
prior to the
AI00926
AI00927