STK14C88-5LF35M Cypress Semiconductor Corp, STK14C88-5LF35M Datasheet - Page 3

• Manufacturer Part Number: STK14C88-5LF35M
• Manufacturer: Cypress Semiconductor Corp

Specifications of STK14C88-5LF35M

• Lead Free Status / RoHS Status: Compliant

Pin Configurations
Figure 1. Pin Diagram - 32-Pin 300 Mil SOIC/CDIP
Pin Descriptions
Document Number: 001-52038 Rev. *B
Pin Name
DQ
A
V
HSB
V
V
14
NC
7
CAP
W
G
E
CC
SS
-DQ
-A
0
0
V
DQ
DQ
DQ
V
Power Supply Power: 5.0V, +10%.
Power Supply AutoStore Capacitor: Supplies power to nvSRAM during power loss to store data from SRAM
Power Supply Ground.
NC
CAP
A
A
A
A
A
A
A
A
A
A
No Connect
SS
14
12
7
6
3
2
1
5
4
0
0
1
2
Input
Input
Input
Input
I/O
I/O
I/O
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
(TOP)
Address: The 15 address inputs select one of 32,768 bytes in the nvSRAM array.
Data: Bi-directional 8-bit data bus for accessing the nvSRAM.
Chip Enable: The active low E input selects the device.
Write Enable: The active low W enables data on the DQ pins to be written to the address
location latched by the falling edge of E.
Output Enable: The active low G input enables the data output buffers during read cycles.
De-asserting G high caused the DQ pins to tristate.
Hardware Store Busy: When low this output indicates a Store is in progress. When pulled
low external to the chip, it initiates a nonvolatile STORE operation. A weak pull up resistor
keeps this pin high if not connected. (optional connection).
to nonvolatile storage elements.
Unlabeled pins have no internal connections.
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
HSB
V
W
NC
A
A
DQ
DQ
DQ
DQ
DQ
A
A
A
G
E
CC
11
10
13
8
9
7
6
5
4
3
Figure 2. Pin Diagram - 32-Pin 450 Mil LCC
Description
DQ
NC
A
A
A
A
A
A
A
6
3
2
1
5
4
0
0
(TOP)
NC
A
DQ
A
A
A
A
G
E
10
13
8
11
9
7
STK14C88
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