MT18JSF25672PDY-1G1D1 Micron Technology Inc, MT18JSF25672PDY-1G1D1 Datasheet - Page 9

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MT18JSF25672PDY-1G1D1

Manufacturer Part Number
MT18JSF25672PDY-1G1D1
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT18JSF25672PDY-1G1D1

Main Category
DRAM Module
Sub-category
DDR3 SDRAM
Module Type
240RDIMM
Device Core Size
72b
Organization
256Mx72
Total Density
2GByte
Chip Density
1Gb
Maximum Clock Rate
1.066GHz
Operating Supply Voltage (typ)
1.5V
Operating Current
1.53A
Number Of Elements
18
Operating Supply Voltage (max)
1.575V
Operating Supply Voltage (min)
1.425V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Pin Count
240
Mounting
Socket
Lead Free Status / RoHS Status
Compliant
Electrical Specifications
Table 7:
Table 8:
PDF: 09005aef8304aded/Source: 09005aef8304ae2b
JSF18C256x72PD.fm - Rev. A 4/08 EN
Symbol Parameter
V
I
Symbol
V
I
V
VREF
I
VTT
T
T
IN
OZ
DD
I
TT
A
I
C
V
, V
DD
OUT
V
Termination reference current from V
Termination reference voltage (DC) –
command/address bus
Input leakage current;
Any input 0V ≤ V
V
(All other pins not under
test = 0V)
Output leakage current;
0V ≤ V
DQ and ODT are disabled;
ODT is HIGH
V
V
(All other pins not under test = 0V)
Module ambient operating
temperature
DDR3 SDRAM component
case operating temperature
REF
REF
REF
DD
Absolute Maximum Ratings
Operating Conditions
DQ = V
Parameter
V
Voltage on any pin relative to V
supply voltage
supply leakage current;
input 0V ≤ V
DD
OUT
Notes:
supply voltage relative to V
≤ V
DD
DD
/2 or V
;
IN
IN
Stresses greater than those listed in Table 7 may cause permanent damage to the
module. This is a stress rating only, and functional operation of the module at these or
any other conditions outside those indicated in each device’s data sheet is not implied.
Exposure to absolute maximum rating conditions for extended periods may adversely
affect reliability.
1. V
2. T
3. For further information, refer to technical note
4. The refresh rate is required to double when 85°C < T
≤ V
≤ 0.95V
REF
address signals’ voltage margin and will reduce timing margins.
on Micron’s Web site.
A
DD
TT
CA = V
and T
;
termination voltage in excess of the stated limit will adversely affect the command and
C
DD
Address
inputs,
RAS#, CAS#,
WE#, S#,
CKE, ODT,
BA, CK, CK#
DM
DQ, DQS,
DQS#
Commercial
Industrial
Commercial
Industrial
are simultaneous requirements.
/2
SS
SS
TT
2GB (x72, ECC, DR) 240-Pin DDR3 SDRAM RDIMM
0.49 × V
9
1.425
–600
Min
TBD
–10
–18
–40
–40
–4
DD
0
0
- 20mV 0.5 × V
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Nom
TBD
1.5
TN-00-08: ”Thermal Applications,”
0
0
0
DD
C
Min
–0.4
–0.4
≤ 95°C.
0.51 × V
Electrical Specifications
1.575
Max
+600
TBD
+10
+18
+70
+85
+95
+95
DD
+4
©2008 Micron Technology, Inc. All rights reserved
+ 20mV
+1.975
+1.975
Max
Units
mA
µA
µA
µA
°C
°C
°C
°C
V
V
Units
available
V
V
Notes
2, 3, 4
2, 3
1

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