M69AW048BL70ZB8T STMicroelectronics, M69AW048BL70ZB8T Datasheet - Page 6

• Manufacturer Part Number: M69AW048BL70ZB8T
• Manufacturer: STMicroelectronics

Specifications of M69AW048BL70ZB8T

• Operating Temperature (max): 85C
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Not Compliant

M69AW048B
SIGNAL DESCRIPTIONS
See
1., Signal
nals connected to this device.
Address Inputs (A0-A20). The Address Inputs
select the cells in the memory array to access dur-
ing Read and Write operations.
Data Inputs/Outputs (DQ8-DQ15). The
Byte Data Inputs/Outputs carry the data to or from
the upper part of the selected address during a
Write or Read operation, when Upper Byte Enable
(UB) is driven Low.
Data Inputs/Outputs (DQ0-DQ7). The
Byte Data Inputs/Outputs carry the data to or from
the lower part of the selected address during a
Write or Read operation, when Lower Byte Enable
(LB) is driven Low.
Chip Enable (E1). When asserted (Low), the
Chip Enable, E1, activates the memory state ma-
chine, address buffers and decoders, allowing
Read and Write operations to be performed. When
de-asserted (High), all other pins are ignored, and
the device is put, automatically, in low-power
Standby mode.
Chip Enable (E2). The Chip Enable, E2, puts the
device in Power-down mode (Deep Power-Down,
PAR and Standby) when it is driven Low. One of
6/29
Figure
Names, for a brief overview of the sig-
2., Logic
Diagram,
and
Upper
Lower
Table
these, Deep Power-Down mode, is the lowest
power mode.
Output Enable (G). The Output Enable, G, pro-
vides a high speed tri-state control, allowing fast
read/write cycles to be achieved with the common
I/O data bus.
Write Enable (W). The Write Enable, W, controls
the Bus Write operation of the memory’s Com-
mand Interface.
Upper Byte Enable (UB). The Upper Byte En-
able, UB, gates the data on the Upper Byte Data
Inputs/Outputs (DQ8-DQ15) to or from the upper
part of the selected address during a Write or
Read operation.
Lower Byte Enable (LB). The Lower Byte En-
able, LB, gates the data on the Lower Byte Data
Inputs/Outputs (DQ0-DQ7) to or from the lower
part of the selected address during a Write or
Read operation.
V
supplies the power for all operations (Read, Write,
etc.) and for driving the refresh logic, even when
the device is not being accessed.
V
all voltage measurements.
CC
SS
Ground. The V
Supply Voltage. The V
SS
Ground is the reference for
CC
Supply Voltage