XRA00SBN18I1GE STMicroelectronics, XRA00SBN18I1GE Datasheet - Page 18

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XRA00SBN18I1GE

Manufacturer Part Number
XRA00SBN18I1GE
Description
Manufacturer
STMicroelectronics
Datasheet

Specifications of XRA00SBN18I1GE

Lead Free Status / RoHS Status
Compliant
XRA00
MEMORY MAPPING
The XRA00 is divided into 8 blocks of 16 bits. The
device is read bit by bit and written to on a block by
block basis (16 bits at a time). The XRA00 memory
map is shown in
In the XRA00, the first block is used to store the
CRC value as defined in the ePC specification.
Figure 25. XRA00 Memory Map
Note: 1. ST may write part of the ePC code.
USER mode
After programming the ePC information, the
XRA00 can be locked. Once locked, the XRA00
18/40
Figure 25.
Row
0
1
2
3
4
5
6
7
Address
112 D
00 D
16 D
32 D
48 D
64 D
80 D
96 D
15
Lock Code
Write Lockable User Area
Write Lockable User Area
Write Lockable User Area
Write Lockable User Area
Write Lockable User Area
Write Lockable User Area
Write Lockable User Area
The next 6 blocks are used to store the 96-bit ePC
code that is used during the inventory sequence.
The last block is divided into two 8-bit areas, one
that contains the Kill Code and the other that con-
tains the Lock Code used to protect the memory
data contents.
answers to anti-collision and scroll commands
only. The ERASEID, PROGRAMID and VERIFY-
ID commands are de-activated.
Kill Code
0
EPC mapping
EPC Data
EPC Data
EPC Data
EPC Data
EPC Data
EPC Data
CRC
ai10764

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