IS66WVE2M16BLL-70BLI ISSI, Integrated Silicon Solution Inc, IS66WVE2M16BLL-70BLI Datasheet - Page 13

• Manufacturer Part Number: IS66WVE2M16BLL-70BLI
• Manufacturer: ISSI, Integrated Silicon Solution Inc

Specifications of IS66WVE2M16BLL-70BLI

• Lead Free Status / RoHS Status: Compliant

Rev.00C | March 2010
Configuration Registers Operation
Access Using ZZ#
Figure 5: Load Configuration Register Operation Using ZZ#
Address
The configuration register (CR) defines how the PSRAM device performs a transparent self refresh.
Altering the refresh parameters can dramatically reduce current consumption during standby mode.
Page mode controls is embedded in the CR. This register can be updated any time the device is
operating in a standby state. The control bits used in the CR are shown in Table 3. At power-up,
the CR is set to 0010h.
The CR can be loaded using a WRITE operation immediately after ZZ# makes a HIGH-to-LOW
transition (see Figure 5). The values placed on addresses A[20:0] are latched into the CR on the
rising edge of CE# or WE#, whichever occurs first. LB#/UB# are “Don’t Care.” Access using ZZ#
is WRITE only.
WE#
CE#
ZZ#
t < 500ns
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