SLFLD25-2GBJ STEC, SLFLD25-2GBJ Datasheet - Page 15

• Manufacturer Part Number: SLFLD25-2GBJ
• Manufacturer: STEC
• Type: Flash Driver

Specifications of SLFLD25-2GBJ

• Density: 2GByte
• Operating Supply Voltage (typ): 5V
• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Package Type: Not Required
• Mounting: Screw
• Pin Count: 44
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Programmable: Yes
• Lead Free Status / RoHS Status: Not Compliant

SLFLD25-xxxJ(I)
Device Control Register
This write only register is used for controlling the interrupt
request and issuing an ATA soft reset to the drive.
Drive Address Register
This read only register is used for confirming the drive’s
status. This register is provided for compatibility with the AT
disk drive interface and it is not recommended that this
register be mapped into the host’s I/O space because of
potential conflicts on bit 7.
bit Name
7-4 x
3
2
1
0
bit Name
7
6
5-2 nHS3-0 (Head Select 3-0)
1
0
High-Z
bit7
bit7
x
1
SRST (Software ReSeT)
nIEN (Interrupt ENable)
0
x
nWTG (WriTing Gate)
nDS1 (Drive Select 1)
nDS0 (Drive Select 0)
nWTG
bit6
bit6
x
nHS3
bit5
bit5
x
nHS2
bit4
bit4
x
Function
Don’t care.
This bit is set to “1”.
This bit is set to “1” in order to force the drive to perform an AT disk control
soft reset operation.
When set to “0”, it enables interrupts to the host (using the -IREQ tri-state
pin). When inactive (set to “1”) or drive is not selected, it disables all pending
interrupts (-IREQ in high-Z). This bit is ignored in memory mode.
This bit is set to “0”.
nHS1
Function
This bit is unused.
This bit is unused.
These bits are the negative value of the Head Select bits (bit 3 to 0) in the
Drive/Head register
When set to “0”, drive 1 is active and selected.
When set to “0”, drive 0 is active and selected.
bit3
bit3
1
nHS0
SRST
bit2
bit2
Document Part Number 61000-02817-109 March 2005
nIEN
nDS1
bit1
bit1
nDS0
bit0
bit0
0
IDE FLASH DRIVE
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