MT29F8G08ABABAWP:B Micron Technology Inc, MT29F8G08ABABAWP:B Datasheet - Page 71

• Manufacturer Part Number: MT29F8G08ABABAWP:B
• Manufacturer: Micron Technology Inc

Specifications of MT29F8G08ABABAWP:B

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Program Operations
PROGRAM PAGE Operations
PROGRAM PAGE CACHE Operations
PROGRAM PAGE MULTI-PLANE Program Operations
PROGRAM PAGE MULTI-PLANE Program Cache Operations
PDF: 09005aef8386131b / Source: 09005aef838cad98
m61a_async_sync_nand.fm - Rev. A 2/09 EN
Note:
Within a block, pages must be programmed sequentially from the least significant page
address to the most significant page address (i.e. 0, 1, 2, ….., 127). During a program
operation, the contents of the cache and/or data registers are modified by the internal
control logic.
The PROGRAM PAGE (80h-10h) command, when not preceded by the PROGRAM PAGE
MULTI-PLANE (80h-11h) command, programs one page from the cache register to the
NAND Flash array. When the LUN is ready (RDY = 1, ARDY = 1), the host should check
the FAIL bit to verify that the operation has completed successfully.
The PROGRAM PAGE CACHE (80h-15h) command can be used to improve program
operation system performance. When this command is issued, the LUN goes busy
(RDY = 0, ARDY = 0) while the cache register contents are copied to the data register, and
the LUN is busy with a program cache operation (RDY = 1, ARDY = 0). While the contents
of the data register are moved to the NAND Flash array, the cache register is available for
an additional PROGRAM PAGE CACHE (80h-15h) or PROGRAM PAGE (80h-10h)
command.
The PROGRAM PAGE MULTI-PLANE (80h-11h) command can be used to improve
program operation system performance by enabling multiple pages to be moved from
the cache registers to different planes of the NAND Flash array. This is done by
prepending one or more PROGRAM PAGE MULTI-PLANE (80h-11h) commands in front
of the PROGRAM PAGE (80h-10h) command. See “Multi-Plane Operations” on page 86
for details.
The PROGRAM PAGE MULTI-PLANE (80h-11h) command can be used to improve
program cache operation system performance by enabling multiple pages to be moved
from the cache registers to the data registers and, while the pages are being transferred
from the data registers to different planes of the NAND Flash array, free the cache regis-
ters to receive data input from the host. This is done by prepending one or more
PROGRAM PAGE MULTI-PLANE (80h-11h) commands in front of the PROGRAM PAGE
CACHE (80h-15h) command. See “Multi-Plane Operations” on page 86 for details.
For PROGRAM PAGE CACHE-series (80h-15h) operations, during the LUN busy times,
t
operations (70h, 78h) and RESET (FFh, FCh). When RDY = 1 and ARDY = 0, the only
valid commands during PROGRAM PAGE CACHE-series (80h-15h) operations are sta-
tus operations (70h, 78h), PROGRAM PAGE CACHE (80h-15h), PROGRAM PAGE (80h-
10h), CHANGE WRITE COLUMN (85h), CHANGE ROW ADDRESS (85h), and RESET
(FFh, FCh).
CBSY and
t
Micron Confidential and Proprietary
LPROG, when RDY = 0 and ARDY = 0, the only valid commands are status
8Gb Asychronous/Synchronous NAND Flash Memory
71
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Command Definitions
©2008 Micron Technology, Inc. All rights reserved.
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