M27C320-100M1 STMicroelectronics, M27C320-100M1 Datasheet - Page 5

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M27C320-100M1

Manufacturer Part Number
M27C320-100M1
Description
Manufacturer
STMicroelectronics
Datasheet

Specifications of M27C320-100M1

Density
32Mb
Organization
2Mx16/4Mx8
Interface Type
Parallel
Bus Type
Parallel
In System Programmable
External
Access Time (max)
100ns
Package Type
SO
Reprogramming Technique
OTP
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Supply Current
70mA
Pin Count
44
Mounting
Surface Mount
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Not Compliant

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0
Table 7. Read Mode DC Characteristics
(T
Note: 1. V
Two Line Output Control
Because EPROMs are usually used in larger
memory arrays, this product features a 2 line con-
trol function which accommodates the use of mul-
tiple memory connection. The two line control
function allows:
a. the lowest possible memory power dissipation,
b. complete assurance that output bus contention
For the most efficient use of these two control
lines, E should be decoded and used as the prima-
ry device selecting function, while G should be
made a common connection to all devices in the
array and connected to the READ line from the
system control bus. This ensures that all deselect-
ed memory devices are in their low power standby
mode and that the output pins are only active
when data is required from a particular memory
device.
Symbol
A
V
will not occur.
I
I
V
V
I
CC
CC
I
I
V
IH
= 0 to 70 C, –40 to 85 C or –40 to 125 C; V
I
CC
LO
PP
OL
OH
LI
2. Maximum DC voltage on Output is V
IL
(2)
1
2
CC
must be applied simultaneously with or before V
Input Leakage Current
Output Leakage Current
Supply Current
Supply Current (Standby) TTL
Supply Current (Standby) CMOS
Program Current
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage TTL
Parameter
CC
+0.5V.
(1)
PP
E = V
E = V
and removed simultaneously or after V
CC
= 5V
IL
IL
0V
Test Condition
E > V
System Considerations
The power switching characteristics of Advanced
CMOS EPROMs require careful decoupling of the
supplies to the devices. The supply current I
has three segments of importance to the system
designer: the standby current, the active current
and the transient peaks that are produced by the
falling and rising edges of E.
The magnitude of the transient current peaks is
dependent on the capacitive and inductive loading
of the device outputs. The associated transient
voltage peaks can be suppressed by complying
with the two line output control and by properly se-
lected decoupling capacitors. It is recommended
that a 0.1 F ceramic capacitor is used on every
device between V
high frequency type of low inherent inductance
and should be placed as close as possible to the
device. In addition, a 4.7 F electrolytic capacitor
should be used between V
eight devices. This capacitor should be mounted
near the power supply connection point. The pur-
pose of this capacitor is to overcome the voltage
drop caused by the inductive effects of PCB trac-
es.
0V
, G = V
, G = V
I
OH
I
V
OL
f = 8MHz
f = 5MHz
PP
E = V
V
= –400 A
V
= 2.1mA
CC
OUT
10%)
IN
= V
IL
IL
, I
, I
– 0.2V
IH
CC
OUT
OUT
V
V
CC
CC
= 0mA,
= 0mA,
CC
and V
PP
.
–0.3
Min
2.4
2
CC
SS
. This should be a
and V
V
CC
Max
100
0.8
0.4
70
50
10
10
1
1
SS
+ 1
M27C320
for every
Unit
mA
mA
mA
V
V
V
V
A
A
A
A
5/15
CC

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