M27W016-100N1 STMicroelectronics, M27W016-100N1 Datasheet - Page 8

• Manufacturer Part Number: M27W016-100N1
• Manufacturer: STMicroelectronics

Specifications of M27W016-100N1

• Interface Type: Parallel
• In System Programmable: External
• Access Time (max): 100ns
• Package Type: TSOP
• Reprogramming Technique: OTP
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Supply Current: 10mA
• Pin Count: 48
• Mounting: Surface Mount
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Supplier Unconfirmed

M27W016
BUS OPERATIONS
There are six standard bus operations that control
the device. These are Bus Read, Bus Write, Out-
put Disable, Standby, Automatic Standby and
Electronic Signature. See Tables 2, Bus Opera-
tions, for a summary. Typically glitches of less
than 5ns on Chip Enable or Write Enable are ig-
nored by the memory and do not affect bus opera-
tions.
Bus Read. Bus Read operations read from the
memory cells, or specific registers in the Com-
mand Interface. A valid Bus Read operation in-
volves setting the desired address on the Address
Inputs and applying a Low signal, V
able and Output Enable. The Data Inputs/Outputs
will output the value, see Figure 12, Read AC
Waveforms, and Table 11, Read AC Characteris-
tics, for details of when the output becomes valid.
Bus Write. Bus Write operations write to the
Command Interface. Bus Write is enabled only
when V
tion begins by setting the desired address on the
Address Inputs. The Address Inputs are latched by
the Command Interface on the falling edge of Chip
Enable. The Data Inputs/Outputs are latched by
the Command Interface on the rising edge of Chip
Enable. Output Enable must remain High, V
during the whole Bus Write operation. See Figure
13, Write AC Waveforms, and Table 12, Write AC
Characteristics, for details of the timing require-
ments.
Table 2. Bus Operations
Note: 1. X = V
8/26
Bus Read
Bus Write
Output Disable
Standby
Read Manufacturer
Code
Read Device Code
2. XX = V
3. When reading Status Register during Program algorithm execution V
Operation
PP
is set to V
IL
IL
or V
, V
IH
IH
.
or V
HH
HH
. A valid Bus Write opera-
V
V
V
V
V
E
X
IH
IL
IL
IL
IL
V
V
V
V
V
G
X
IL
IH
IH
IL
IL
IL
, to Chip En-
XX
V
V
V
V
X
X
HH
HH
HH
PP
(3)
IH
,
Cell Address
Command Address
A0 = V
Others V
A0 = V
Others V
Output Disable. The Data Inputs/Outputs are in
the high impedance state when Output Enable is
High, V
Standby. When Chip Enable is High, V
memory enters Standby mode and the Data In-
puts/Outputs pins are placed in the high-imped-
ance state. To reduce the Supply Current to the
Standby Supply Current, I
be held within V
level see Table 10, DC Characteristics.
During program operation the memory will contin-
ue to use the Program Supply Current, I
Program operation until the operation completes.
Automatic Standby. If CMOS levels (V
are used to drive the bus and the bus is inactive for
150ns or more the memory enters Automatic
Standby where the internal Supply Current is re-
duced to the Standby Supply Current, I
Data Inputs/Outputs will still output data if a Bus
Read operation is in progress.
Electronic Signature. The memory has two
codes, the manufacturer code and the device
code, that can be read to identify the memory.
These codes can be read by applying the signals
listed in Tables 2, Bus Operations, once the Auto
Select Command is executed. To exit Electronic
Signature mode, the Read/Reset command must
be issued.
Address Inputs
IL
IH
, A1 = V
, A1 = V
IL
IL
PP
A0-A19
or V
or V
must be kept at V
IH
X
X
.
IH
IH
IL
IL
,
,
CC
± 0.2V. For the Standby current
HH
.
CC2
Data Inputs/Outputs
, Chip Enable should
Data Output
DQ15-DQ0
Data Input
888Dh
0020h
Hi-Z
Hi-Z
CC
CC2
CC3
± 0.2V)
IH
. The
, the
, for