MT41J256M4JP-15E:G Micron Technology Inc, MT41J256M4JP-15E:G Datasheet - Page 55
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MT41J256M4JP-15E:G
Manufacturer Part Number
MT41J256M4JP-15E:G
Description
IC DDR3 SDRAM 1GBIT 78FBGA
Manufacturer
Micron Technology Inc
Series
-r
Specifications of MT41J256M4JP-15E:G
Format - Memory
RAM
Memory Type
DDR3 SDRAM
Memory Size
1G (256M x 4)
Speed
667MHz
Interface
Parallel
Voltage - Supply
1.425 V ~ 1.575 V
Operating Temperature
0°C ~ 95°C
Package / Case
78-TFBGA
Lead Free Status / RoHS Status
Supplier Unconfirmed
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MT41J256M4JP-15E:G
Manufacturer:
Micron Technology Inc
Quantity:
10 000
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ODT Characteristics
Figure 23: ODT Levels and I-V Characteristics
Table 30: On-Die Termination DC Electrical Characteristics
ODT Resistors
PDF: 09005aef826aa906
1Gb_DDR3_SDRAM.pdf – Rev. J 05/10 EN
Parameter/Condition
R
Deviation of VM with respect to
V
TT
DDQ
effective impedance
/2
Notes:
ODT effective resistance R
DM, DQS, DQS#, and TDQS, TDQS# balls (x8 devices only). The ODT target values and
a functional representation are listed in Table 30 and Table 31 (page 56). The individu-
al pull-up and pull-down resistors (R
• R
• R
Table 31 (page 56) provides an overview of the ODT DC electrical characteristics. The
values provided are not specification requirements; however, they can be used as de-
sign guidelines to indicate what R
• R
• R
To
other
circuitry
such as
RCV, . . .
1. Tolerance limits are applicable after proper ZQ calibration has been performed at a sta-
2. Measurement definition for R
3. Measure voltage (VM) at the tested pin with no load:
4. For IT and AT (1Gb only) devices, the minimum values are derated by 6% when the de-
TT(PU)
TT(PD)
TT
TT
ble temperature and voltage (V
(page 57) if either the temperature or voltage changes after calibration.
I[V
R
ΔVM = ----------------- – 1 × 100
vice operates between –40°C and 0°C (T
Chip in termination mode
120Ω is made up of R
60Ω is made up of R
TT
IH(AC)
= -------------------------------------------
= (V
= (V
|I(V
Symbol
R
R
R
TT(PU)
TT(PD)
I
I
ODT
PU
PD
ΔVM
V
], then apply V
(
TT(EFF)
IH(AC)
IH(AC)
OUT
DDQ
2 × VM
Vddq
)/|I
) - I(V
- V
– V
OUT
IL(AC)
OUT
IL(AC)
|, under the condition that R
)/|I
)|
)
IL(AC)
TT60(PD120)
TT
Min
OUT
TT120(PD240)
I
I
OUT
–5
OUT
is defined by MR1[9, 6, and 2]. ODT is applied to the DQ,
55
= I
to pin under test and measure current I[V
|, under the condition that R
PD
V
DQ
V
V
DDQ
SSQ
OUT
TT
- I
TT
PU
DDQ
: Apply V
is targeted to provide:
and R
TT(PU)
See Table 31 (page 56)
= V
and R
Micron Technology, Inc. reserves the right to change products or specifications without notice.
Nom
DD
C
TT60(PU120)
and R
IH(AC)
).
, V
TT120(PU240)
SSQ
1Gb: x4, x8, x16 DDR3 SDRAM
to pin under test and measure current
TT(PD)
= V
TT(PU)
SS
) are defined as follows:
). Refer to ODT Sensitivity
Max
+5
is turned off
TT(PD)
ODT Characteristics
© 2006 Micron Technology, Inc. All rights reserved.
is turned off
Units
IL(AC)
%
]:
Notes
1, 2, 3
1, 2
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