MT48LC16M16A2TG75ITTR Micron Technology Inc, MT48LC16M16A2TG75ITTR Datasheet - Page 30
![no-image](/images/manufacturer_photos/0/4/441/micron_technology_inc_sml.jpg)
MT48LC16M16A2TG75ITTR
Manufacturer Part Number
MT48LC16M16A2TG75ITTR
Description
Manufacturer
Micron Technology Inc
Type
SDRAMr
Datasheet
1.MT48LC16M16A2TG75ITTR.pdf
(92 pages)
Specifications of MT48LC16M16A2TG75ITTR
Organization
16Mx16
Density
256Mb
Address Bus
15b
Access Time (max)
6/5.4ns
Maximum Clock Rate
133MHz
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
135mA
Pin Count
54
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Not Compliant
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256Mb_sdr.pdf - Rev. N 1/10 EN
11. Required clocks are specified by JEDEC functionality and are not dependent on any tim-
12. CLK must be toggled a minimum of two times during this period.
13. Based on
14. The clock frequency must remain constant (stable clock is defined as a signal cycling with-
15. Auto precharge mode only. The precharge timing budget (
16. Precharge mode only.
17. JEDEC and PC100 specify three clocks.
18.
19. Parameter guaranteed by design.
20. PC100 specifies a maximum of 6.5pF.
21. For operating frequencies ≤ 45 MHz,
22. Auto precharge mode only. The precharge timing budget (
ing parameter.
in timing constraints specified for the clock pin) during access or precharge states
(READ, WRITE, including
the data rate.
7.5ns for -75 after the first clock delay and after the last WRITE is executed.
t
the first clock delay, after the last WRITE is executed. May not exceed limit set for pre-
charge mode.
AC for -75/-7E at CL = 3 with no load is 4.6ns and is guaranteed by design.
t
CK = 7.5ns for -75 and -7E, 6ns for -6A.
Electrical Specifications – AC Operating Conditions
t
WR, and PRECHARGE commands). CKE may be used to reduce
30
Micron Technology, Inc. reserves the right to change products or specifications without notice.
t
CKS = 3.0ns.
256Mb: x4, x8, x16 SDRAM
t
t
RP) begins at 7ns for -7E and
RP) begins 6ns for -6A after
© 1999 Micron Technology, Inc. All rights reserved.
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