IS43R16160B-5BLI ISSI, Integrated Silicon Solution Inc, IS43R16160B-5BLI Datasheet - Page 7

• Manufacturer Part Number: IS43R16160B-5BLI
• Manufacturer: ISSI, Integrated Silicon Solution Inc
• Type: SDRAMr

Specifications of IS43R16160B-5BLI

• Organization: 16Mx16
• Density: 256Mb
• Address Bus: 15b
• Access Time (max): 700ps
• Maximum Clock Rate: 200MHz
• Operating Supply Voltage (typ): 2.5V
• Package Type: FBGA
• Operating Temp Range: -40C to 85C
• Operating Supply Voltage (max): 2.7V
• Operating Supply Voltage (min): 2.3V
• Pin Count: 60
• Mounting: Surface Mount
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Compliant

Integrated Silicon Solution, Inc.
Rev. E
08/13/2010
DDR SDRAM (Rev.1.1)
Activate (ACT) [/RAS =L, /CAS =/WE =H]
Read (READ) [/RAS =H, /CAS =L, /WE =H]
Write (WRITE) [/RAS =H, /CAS =/WE =L]
Precharge (PRE) [/RAS =L, /CAS =H, /WE =L]
Auto-Refresh (REFA) [/RAS =/CAS =L, /WE =CKE =H]
IS43R83200B, IS46R83200B
IS43R16160B, IS46R16160B
/CAS latency. When A10 =H at this command, the bank is deactivated after the burst read (auto-
precharge, READA)
(auto-precharge, WRITEA)
/write operation. When A10 =H at this command, all banks are deactivated (precharge all, PREA ).
internally. After this command, the banks are precharged automatically.
ACT command activates a row in an idle bank indicated by BA.
READ command starts burst read from the active bank indicated by BA. First output data appears after
(row) precharge, and auto / self refresh. Each command is defined by control signals of /RAS,
/CAS and /WE at CLK rising edge. In addition to 3 signals, /CS , CKE and A10 are used as chip
select, refresh option, and precharge option, respectively. To know the detailed definition of
commands, please see the command truth table.
BASIC FUNCTIONS
ISSI's 256-Mbit DDR SDRAM provides basic functions, bank (row) activate, burst read / write, bank
WRITE command starts burst write to the active bank indicated by BA. Total data length to be written
is set by burst length. When A10 =H at this command, the bank is deactivated after the burst write
PRE command deactivates the active bank indicated by BA. This command also terminates burst read
REFA command starts auto-refresh cycle. Refresh address including bank address are generated
/CLK
CLK
/CS
/RAS
/CAS
/WE
CKE
A10
Preliminary
Preliminary
Chip Select : L=select, H=deselect
Command
Command
Command
Refresh Option @refresh command
Precharge Option @precharge or read/write command
256M Double Data Rate Synchronous DRAM
define basic commands
A3S56D30/40ETP
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