MT29C4G48MAPLCJI-6 IT TR Micron Technology Inc, MT29C4G48MAPLCJI-6 IT TR Datasheet - Page 16

• Manufacturer Part Number: MT29C4G48MAPLCJI-6 IT TR
• Manufacturer: Micron Technology Inc

Specifications of MT29C4G48MAPLCJI-6 IT TR

• Operating Supply Voltage (max): 1.95V
• Operating Temperature (max): 85C
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Revision History
Rev. I, Preliminary – 6/09
Rev. H, Preliminary – 5/09
Rev. G, Preliminary – 3/09
Rev. F, Preliminary – 11/08
Rev. E, Preliminary – 09/08
PDF: 09005aef83070ff3
168ball_nand_lpdram_j4xx_omap.pdf - Rev. I 6/09
• Updated Figure 2 (page 2) for NAND Flash Configuration codes by adding "y" informa-
• Changed ball Y22 from NC to A14 in Figure 4 (page 6).
• Changed A[13:0] to A[14:0] in Table 3 (page 8).
• Deleted "Device size" bullets from NAND-Flash-Specific Features on the page 1.
• Added 200 MHz CL3 (-5) to Options/Marking table on page 1.
• Updated Figure 2 (page 2) to list "-5 = 200 MHz CL3" under "LPDRAM Access Time."
• Modified Figure 5 (page 11) to change "CS#" to "CSO#," "CKE" to "CKE0," and "CE#"
• Modified Figure 6 (page 12) to change "CE#" to "CE0#."
• Added new Figure 9 (page 15).
• Added MT29C4G48MAPLCJG-6 IT to part number table.
• Updated template for external publication
• “MT29CxGxxMAxxxJG, MT29CxGxxMAxxxJI”: As the third-from-the-last character in
• Figure 3, Ball Assignment: 168-Ball VFBGA (x8 NAND Flash and x16 LPDRAM): Upda-
• Table 2, “NAND Flash Ball Descriptions,” In CE1#/CE0# row, reversed order of ball
• Table 3, “LPDDR Ball Descriptions,”: In BA1/BA0, CKE1/CKE0, and CS1#/CS0# rows,
• Figure 6, 168-Ball Dual LPDDR Functional Block Diagram: Added figure adapted from
• Figure 7, 168-Ball VFBGA (Package Code: JG): Updated figure with current version
• Figure 8, 168-Ball VFBGA (Package Code: JI): Updated figure with current version
tion: y (x8, 4Gb, Second) and z (x16, 4Gb, second).
Udated the Package Codes to show the preferred format. Added "CS#" after "CE#" in
the Chip Count. Changed row B under Chip Count to "1, 1" and row D to "1, 2." Add-
ed "AM" and "AP" under "LPDRAM Configuration." Added "KQ" under "Package
Codes." Deleted "L = Low-Power Option."
to "CE0#."
the part number, replaced “A” with an “x.”
ted figure by replacing “NC”s in lower-left corner with “RFU”s.
numbers to reflect correct highest-to-lowest order; changed “NC” to “RFU1” in the I/
O row; added note 1.
reversed order of ball numbers to reflect correct highest-to-lowest order; in NC row,
removed AE-indicated ball assignments and created a new RFU row.
152-ball.
from MDM.
from MDM.
168-Ball NAND Flash and LPDRAM PoP (TI OMAP) MCP
16
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©2007 Micron Technology, Inc. All rights reserved.
Revision History