AT52BR1664A-70CI Atmel, AT52BR1664A-70CI Datasheet
AT52BR1664A-70CI
Specifications of AT52BR1664A-70CI
Related parts for AT52BR1664A-70CI
AT52BR1664A-70CI Summary of contents
Page 1
... V Operating Voltage CC • Access Time • Fully Static Operation and Tri-state Output • 1.2V (Min) Data Retention Device Number Flash Configuration AT52BR1664A(T) SRAM Configuration 4M (256K x 16) 16M (1M x 16) 16-megabit Flash + 4-megabit SRAM Stack Memory AT52BR1664A AT52BR1664AT Rev. 3361C–STKD–1/04 1 ...
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... CBGA Top View Pin Configurations Pin Name A0 - A17 A18 - A19 CE OE/SOE WE/SWE VCC VPP I/O0-I/O15 SCS1, SCS2 RDY/BUSY SVCC GND/SGND SUB SLB NC RESET AT52BR1664A( A11 A15 A16 A8 A10 WE RDY BUSY SGND RESET NC Vpp A19 SLB SUB SOE A18 A17 Function Flash/SRAM Common Address Input for 4M SRAM ...
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... Description The AT52BR1664A(T) combines a single plane 16-Mbit Flash and a 4-megabit SRAM in a stacked 66-ball CBGA package. Both devices operate at 2.7V to 3.3 in the industrial temperature range. Block Diagram Absolute Maximum Ratings Temperature under Bias.................................. -40° +85° C Storage Temperature .................................... -55° +150° C All Input Voltages ...
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... Flash Memory Block Diagram OUTPUT BUFFER INPUT A0 - A19 BUFFER ADDRESS LATCH Y-DECODER X-DECODER AT52BR1664A(T) 4 I/O0 - I/O15 INPUT BUFFER IDENTIFIER REGISTER STATUS REGISTER COMMAND REGISTER DATA COMPARATOR WRITE STATE MACHINE Y-GATING MAIN MEMORY RESET RDY/BUSY PROGRAM/ERASE VPP VOLTAGE SWITCH VCC GND ...
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... PP . Erase, Erase Suspend/Resume and Program Suspend/Resume commands will not AT52BR1664A(T) input is below 0.4V, the program and 0.9V or above, normal program and erase opera- 5 ...
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... WORD PROGRAMMING: Once a memory block is erased programmed (to a logical “0” word-by-word basis. Programming is accomplished via the internal device command reg- ister and is a four-bus cycle operation. The device will automatically generate the required internal program pulses. AT52BR1664A( When the sec- SEC 3361C– ...
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... The Data Polling status bit must be used in conjunction with the erase/program and V bit as shown in the algorithm in Figures 1 and 2 on page 11. 3361C–STKD–1/04 voltage is less that 0.4V. When V PP AT52BR1664A( 0.9V or above, normal program and erase PP cycle BP status ...
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... I/O0 is low, the sector can be programmed; if the data on I/O0 is high, the program lockdown feature has been enabled and the sector cannot be programmed. The software product identification exit code should be used to return to standard operation. AT52BR1664A(T) 8 status bit has been set to a “1”, the system must write the ...
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... Product ID Entry command is given followed by a normal read operation from an address within the protection register. After determining whether block B is protected or not, or reading the protection register, the Product ID Exit command must be given prior to performing any other operation. 3361C–STKD–1/04 AT52BR1664A(T) 9 ...
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... INPUT LEVELS: While operating with a 2.7V to 3.3V power supply, the address inputs and control inputs (OE, CE and WE) may be driven from 0 to 5.5V without adversely affecting the operation of the device. The I/O lines can only be driven from AT52BR1664A(T) 10 power-on delay: once less than V ...
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... I/O7 may change simultaneously with I/O5. 3361C–STKD–1/04 Figure 2. Data Polling Algorithm (Configuration Register = 01) YES YES Program/Erase Operation Successful, Device in Read Mode Note: AT52BR1664A(T) START Read I/O7 - I/O0 Read I/O7 - I/O0 NO Toggle Bit = Toggle? YES NO I/O3, I/ YES Read I/O7 - I/O0 Twice ...
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... Operation Not Successful, Write Product ID Exit Command Note: 1. The system should recheck the toggle bit even if I/O5 = “1” because the toggle bit may stop toggling as I/O5 changes to “1”. AT52BR1664A(T) 12 Figure 4. Toggle Bit Algorithm (Configuration Register = 01) Program/Erase Operation Successful, Device in ...
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... I/O7 I/ 00/01 0 TOGGLE 0 0 TOGGLE DATA DATA 0 TOGGLE DATA DATA 1 1 DATA DATA level is not high enough to successfully perform program and erase operations. PP AT52BR1664A(T) Status Bit (1) (2) I/O5 I/O3 I/O2 00/01 00/01 00/ TOGGLE 0 0 TOGGLE DATA DATA DATA 0 0 TOGGLE DATA ...
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... Temperature under Bias ................................ -55°C to +125°C Storage Temperature ..................................... -65°C to +150°C All Input Voltages (including NC Pins) with Respect to Ground ...................................-0.6V to +6.25V All Output Voltages with Respect to Ground .............................-0. Voltage with Respect to Ground ...................................-0.6V to +13.0V AT52BR1664A(T) 14 (1) 2nd Bus 3rd Bus Cycle Cycle Data Addr Data ...
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... Protection Register Addressing Table Word Use 0 Factory 1 Factory 2 Factory 3 Factory 4 User 5 User 6 User 7 User Note: All address lines not specified in the above table must be “0” when accessing the protection register, i.e., A19 - 3361C–STKD–1/04 Block AT52BR1664A( ...
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... AT52BR1664A – Sector Address Table Sector SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 SA19 SA20 SA21 SA22 SA23 SA24 SA25 SA26 SA27 SA28 SA29 SA30 SA31 SA32 SA33 SA34 ...
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... AT52BR1664AT – Sector Address Table Sector SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 SA19 SA20 SA21 SA22 SA23 SA24 SA25 SA26 SA27 SA28 SA29 SA30 SA31 SA32 SA33 SA34 ...
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... Refer to AC programming waveforms on page 23 12.0V ± 0.5V Manufacturer Code: 001FH, Device Code: 00C0H – Bottom Boot, 00C2H, Top Boot. 5. See details under “Software Product Identification Entry/Exit” on page 25 (min) = 0.9V; V (max) = 3.6V. IHPP IHPP 7. V (max) = 0.4V. ILPP AT52BR1664A(T) 18 Ind. WE RESET (6) ...
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... Output Low Voltage OL2 V Output High Voltage OH1 V Output High Voltage OH2 Note the erase mode mA. CC 3361C–STKD–1/04 Condition Min I 0. MHz OUT -400 µA 2 -100 µA 2.5 OH AT52BR1664A(T) Typ Max Units 2 µA 10 µ µ µA 0 0. ...
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... ADDRESS CE OE RESET OUTPUT Notes may be delayed may be delayed without impact ACC specified from OE or CE, whichever occurs first ( pF This parameter is characterized and is not 100% tested. AT52BR1664A(T) 20 16-Mbit Flash-70 Min tRC ADDRESS VALID tCE tOE tACC tRO HIGH after the address transition without impact on t ...
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... Input Test Waveforms and Measurement Level Output Test Load Pin Capacitance ( MHz 25°C Symbol Typ OUT Note: This parameter is characterized and is not 100% tested. 3361C–STKD–1/ < 2. 1029 Ohm (1) 1728 Ohm CL Max 6 12 AT52BR1664A(T) Units Conditions OUT 21 ...
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... Address Hold Time AH t Chip Select Setup Time CS t Chip Select Hold Time CH t Write Pulse Width ( Data Setup Time Data, OE Hold Time DH OEH t Write Pulse Width High WPH AC Word Load Waveforms WE Controlled CE Controlled AT52BR1664A(T) 22 Min Max Units 3361C–STKD–1/04 ...
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... PROGRAM CYCLE WPH 555 555 AAA ADDRESS DATA ( WPH 555 555 555 AAA WORD 0 WORD 1 WORD 2 WORD 3 AT52BR1664A(T) Min Typ Max 500 555 INPUT AA DATA Note 2 AAA Note 3 WORD 4 WORD 5 Units 200 µs 100 µ seconds 3.0 seconds 5.0 seconds 15 µs 10 µs 23 ...
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... Read Characteristics” on page 20. OE (1)(2)(3) Toggle Bit Waveforms Notes: 1. Toggling either both OE and CE will operate toggle bit. The t input(s). 2. Beginning and ending state of I/O6 will vary. 3. Any address location may be used but the address should not vary. AT52BR1664A(T) 24 (1) tOEH tOE HIGH ...
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... Sector Lockdown Enable Algorithm (1)(6) LOAD DATA F0 TO ANY ADDRESS EXIT PRODUCT IDENTIFICATION (4) MODE Notes AT52BR1664A(T) LOAD DATA AA TO ADDRESS 555 LOAD DATA 55 TO ADDRESS AAA LOAD DATA 80 TO ADDRESS 555 LOAD DATA AA TO ADDRESS 555 LOAD DATA 55 TO ADDRESS AAA ...
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... Features • Fully Static Operation and Tri-state Output • TTL Compatible Inputs and Outputs • Battery Backup – 1.2V (Min) Data Retention Voltage (V) 2.7 - 3.3 Block Diagram SCS1 SCS2 AT52BR1664A(T) 26 Current/I Speed (ns A17 SOE SLB SUB SWE Operation Standby Current (mA) (µ ...
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... SLB SUB Mode X X Deselected Output Disabled Write Read Min 2.7 0 2.2 (1) -0.3 AT52BR1664A(T) Unit V V ° C ° C 1.0 W I/O Pin I/O0 - I/O7 I/O8 - I/O15 High-Z High-Z High-Z High-Z D High-Z IN High High High-Z OUT High-Z D OUT D D OUT OUT D High-Z OUT ...
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... V Output High OH (1) Capacitance (Temp = 25° 1.0 MHz) Symbol Parameter C Input Capacitance (Add, SCS1, IN SCS2, SLB, SUB, SWE, SOE) C Output Capacitance (I/O) OUT Note: 1. These parameters are sampled and not 100% tested. AT52BR1664A(T) 28 Test Condition V < V < < V < OUT CC SCS1 = V or SCS2=V ...
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... Output Active from End of Write OW AC Test Conditions TA = -40° 85° C, Unless Otherwise Specified Parameter Input Pulse Level Input Rise and Fall Time Input and Output Timing Reference Level Output Load CLZ OLZ BLZ Others 3361C–STKD–1/ CHZ OHZ BHZ WHZ OW AT52BR1664A( Min Max ...
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... Transition is measured ± 200 mV from steady state voltage. This parameter is sampled and not 100% tested. 4. SCS1 in high for the standby, low for active. SCS2 in low for the standby, high for active. SUB and SLB in high for the standby, low for active. AT52BR1664A( ...
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... SCS1 in high for the standby, low for active SCS2 in low for the standby, high for active. SUB and SLB in high for the standby, low for active. 3361C–STKD–1/04 (1),(4),( HIGH-Z DATA VALID (3)(7) t WHZ (1),(4),( HIGH-Z HIGH-Z AT52BR1664A(T) ( (5) (5) ( DATA VALID 31 ...
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... Note: 1. Typical values are under the condition read cycle time. RC Data Retention Timing Diagram 1 VCC 2.7V IH VDR SCS1 VSS Data Retention Timing Diagram 2 VCC 2.7V SCS2 VDR 0.4V VSS AT52BR1664A(T) 32 Test Condition SCS1 > 0. SCS2 < 0. SUB, SLB > 0. > 0. < 0.2V ...
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... Plastic Chip-scale Ball Grid Array Package (CBGA) 3361C–STKD–1/04 Ordering Code Boot Block AT52BR1664AT-70CI Top AT52BR1664AT-90CI Top AT52BR1664A-70CI Bottom AT52BR1664A-90CI Bottom Package Type AT52BR1664A(T) Package Operation Range 66C5 Industrial (-40° to 85° C) 66C5 Industrial (-40° ...
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... CBGA Marked A1 Identifier D Top View 0.60 REF Øb Bottom View 2325 Orchard Parkway San Jose, CA 95131 R AT52BR1664A( Ball Corner e 1.20 REF TITLE 66C5, 66-ball ( Array 1.2 mm Body, 0.8 mm Ball Pitch Chip-scale Ball Grid Array Package (CBGA) 0.12 C Seating Plane ...
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