AT52BR1664-90CU Atmel, AT52BR1664-90CU Datasheet
AT52BR1664-90CU
Specifications of AT52BR1664-90CU
Related parts for AT52BR1664-90CU
AT52BR1664-90CU Summary of contents
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... Fully Static Operation and Tri-state Output • 1.2V (Min) Data Retention Device Number Flash Configuration AT52BR1662(T) AT52BR1664(T) SRAM Configuration 2M (128K x 16) 16M (1M x 16) 4M (256K x 16) 16M (1M x 16) 16-megabit Flash + 2-megabit/ 4-megabit SRAM Stack Memory AT52BR1662(T) AT52BR1664(T) Rev. 2212C–STKD–09/02 1 ...
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CBGA Top View Pin Configurations Pin Name A0 - A16 A0 - A17 A18 - A19 CE OE/SOE WE/SWE VCC VPP I/O0-I/O15 SCS1, SCS2 RDY/BUSY SVCC GND/SGND SUB SLB NC RESET AT52BR1662(T)/1664(T) ...
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... The AT52BR1662(T) combines a single plane 16-megabit Flash and a 2-megabit SRAM in a stacked 66-ball CBGA pack- age; while the AT52BR1664(T) combines a single plane 16-megabit Flash and a 4-megabit SRAM in a stacked 66-ball CBGA package. Both devices operate at 2.7V to 3.3 in the industrial temperature range. ...
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Flash Memory Block Diagram OUTPUT BUFFER INPUT A0 - A19 BUFFER ADDRESS LATCH Y-DECODER X-DECODER AT52BR1662(T)/1664(T) 4 I/O0 - I/O15 INPUT BUFFER IDENTIFIER REGISTER STATUS REGISTER COMMAND REGISTER DATA COMPARATOR WRITE STATE MACHINE Y-GATING MAIN MEMORY ...
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The 16-megabit Flash memory is organized as 1,048,576 words of 16 bits each. The x16 data appears on I/O0 - I/O15. The memory is divided into 39 sectors for erase operations. The Flash device has CE and OE control ...
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CHIP ERASE: The entire device can be erased at one time by using the six-byte chip erase software code. After the chip erase has been initiated, the device will internally time the erase operation so that no external clocks are ...
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Voltages applied to the RESET pin will not alter the value of the configuration regis- ter. The value of the configuration register will affect the operation of the I/O7 status bit as described below. DATA POLLING: The 16-megabit features ...
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... PRODUCT IDENTIFICATION: The product identification mode identifies the device and man- ufacturer as Atmel. It may be accessed by hardware or software operation. The hardware operation mode can be used by an external programmer to identify the correct programming algorithm for the Atmel product. ...
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Definition in Hex” table on page 13. Data bit D1 must be zero during the fourth bus cycle. All other data bits during the fourth bus cycle are don’t cares. To determine ...
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Figure 1. Data Polling Algorithm (Configuration Register = 00) START Read I/O7 - I/O0 Addr = VA YES I/O7 = Data I/O3, I/ YES Read I/O7 - I/O0 Addr = VA YES I/O7 = Data? NO ...
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Figure 3. Toggle Bit Algorithm (Configuration Register = 00) START Read I/O7 - I/O0 Read I/O7 - I/O0 NO Toggle Bit = Toggle? YES NO I/O3, I/ YES Read I/O7 - I/O0 Twice Toggle Bit = NO Toggle? ...
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Status Bit Table I/O7 Configuration Register: 00 Programming I/O7 Erasing 0 Erase Suspended & Read 1 Erasing Sector Erase Suspended & Read DATA Non-erasing Sector Erase Suspended & I/O7 Program Non-erasing Sector Notes: 1. I/O5 switches to a “1” when ...
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Command Definition in Hex 1st Bus Cycle Command Bus Sequence Cycles Addr Read 1 Addr Chip Erase 6 555 Sector Erase 6 555 Word Program 4 555 Enter Single Pulse 6 555 Program Mode Single Pulse Word 1 Addr Program ...
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Protection Register Addressing Table Word Use Block 0 Factory 1 Factory 2 Factory 3 Factory 4 User 5 User 6 User 7 User Note: 1. All address lines not specified in the above table must be “0” when accessing the ...
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Top Boot 16-megabit Flash – Sector Address Table Sector SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 SA19 SA20 SA21 SA22 SA23 SA24 SA25 SA26 SA27 SA28 SA29 SA30 ...
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Bottom Boot 16-megabit Flash – Sector Address Table Sector SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 SA19 SA20 SA21 SA22 SA23 SA24 SA25 SA26 SA27 SA28 SA29 SA30 ...
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DC and AC Operating Range Operating Temperature (Case) Ind. V Power Supply CC Operating Modes Mode CE OE Read (2) Program/Erase (1) Standby/Program Inhibit Program Inhibit X ...
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DC Characteristics Symbol Parameter I Input Load Current LI I Output Leakage Current Standby Current CMOS SB1 Standby Current TTL SB2 Standby Current TTL SB3 CC (1)( Active Read ...
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AC Read Characteristics Symbol Parameter t Read Cycle Time RC t Address to Output Delay ACC ( Output Delay CE ( Output Delay OE (3)( Output Float DF ...
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Input Test Waveforms and Measurement Level Output Test Load Pin Capacitance ( MHz 25°C Symbol Typ OUT Note: 1. This parameter is characterized and is not 100% tested AT52BR1662(T)/1664(T) 20 ...
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AC Word Load Characteristics Symbol Parameter Address, OE Setup Time AS OES t Address Hold Time AH t Chip Select Setup Time CS t Chip Select Hold Time CH t Write Pulse Width (WE or CE) ...
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Program Cycle Characteristics Symbol Parameter t Word Programming Time (V BP IHPP t Word Programming Time (V BPVPP PP t Address Setup Time AS t Address Hold Time AH t Data Setup Time DS t Data Hold Time DH t ...
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Data Polling Characteristics Symbol Parameter t Data Hold Time Hold Time OEH ( Output Delay OE t Write Recovery Time WR Notes: 1. These parameters are characterized and not 100% tested. 2. See t ...
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Software Product Identification Entry LOAD DATA AA TO ADDRESS 555 LOAD DATA 55 TO ADDRESS AAA LOAD DATA 90 TO ADDRESS 555 ENTER PRODUCT IDENTIFICATION (2)(3)(5) MODE Software Product Identification Exit OR LOAD DATA AA TO ADDRESS 555 LOAD DATA ...
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The 2-megabit SRAM is a high-speed, super low-power CMOS SRAM organized as 128K words by 16 bits. The SRAM uses high-performance full CMOS process technology and is SRAM designed for high-speed and low-power circuit technology particularly well-suited ...
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Absolute Maximum Ratings Symbol Parameter Input/Output Voltage IN OUT V Power Supply CC T Operating Temperature A T Storage Temperature STG P Power Dissipation D Note: 1. Stresses greater than those listed under “Absolute Maximum Ratings” may ...
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DC Electrical Characteristics T = -40°C to 85°C A Symbol Parameter I Input Leakage Current LI I Output Leakage Current LO I Operating Power Supply Current CC I Average Operating Current CC1 I Standby Current (TTL Input Standby ...
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AC Characteristics T = -40°C to 85°C, Unless Otherwise Specified A # Symbol Parameter 1 t Read Cycle Time Address Access Time Chip Select Access Time ACS 4 t Output Enable to Output Valid ...
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Output Test Load Timing Diagrams (1),(4) Read Cycle 1 ADDRESS SCS1 SCS2 SUB, SLB SOE DATA OUT (1) (2) ( Read Cycle 2 ADDRESS DATA OUT (1) (2) ( Read Cycle 3 SCS1 SUB, SLB SCS2 ...
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Write Cycle 1 (SWE Controlled) ADDRESS SCS1 SCS2 SUB, SLB SWE DATA IN DATA OUT Write Cycle 2 (SCS1, SCS2 Controlled) ADDRESS SCS1 SCS2 SUB, SLB SWE DATA IN DATA OUT Notes write occurs during the overlap of ...
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Data Retention Electric Characteristic T = -40°C to 85°C A Symbol Parameter V V for Data Retention Data Retention Current CCDR t Chip Deselect to Data CDR Retention Time t Operating Recovery Time R Notes: 1. Typical ...
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The 4-megabit SRAM is a high-speed, super low-power CMOS SRAM organized as 256K words by 16 bits. The SRAM uses high-performance full CMOS process technology and is SRAM designed for high-speed and low-power circuit technology particularly well-suited ...
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Absolute Maximum Ratings Symbol Parameter Input/Output Voltage IN OUT V Power Supply CC T Operating Temperature A T Storage Temperature STG P Power Dissipation D Note: 1. Stresses greater than those listed under “Absolute Maximum Ratings” may ...
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DC Electrical Characteristics T = -40°C to 85°C A Symbol Parameter I Input Leakage Current LI I Output Leakage Current LO I Operating Power Supply Current CC I Average Operating Current CC1 I Standby Current (TTL Input Standby ...
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AC Characteristics T = -40°C to 85°C, Unless Otherwise Specified A # Symbol Parameter 1 t Read Cycle Time Address Access Time Chip Select Access Time ACS 4 t Output Enable to Output Valid ...
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Output Test Load Timing Diagrams (1),(4) Read Cycle 1 ADDRESS SCS1 SCS2 SUB, SLB SOE DATA OUT (1) (2) ( Read Cycle 2 ADDRESS DATA OUT (1) (2) ( Read Cycle 3 SCS1 SUB, SLB SCS2 ...
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Write Cycle 1 (SWE Controlled) ADDRESS SCS1 SCS2 SUB, SLB SWE DATA IN DATA OUT Write Cycle 2 (SCS1, SCS2 Controlled) ADDRESS SCS1 SCS2 SUB, SLB SWE DATA IN DATA OUT Notes write occurs during the overlap of ...
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Data Retention Electric Characteristic T = -40°C to 85°C A Symbol Parameter V V for Data Retention Data Retention Current CCDR t Chip Deselect to Data CDR Retention Time t Operating Recovery Time R Note: 1. Typical ...
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... Boot Block AT52BR1662T-70CI Top AT52BR1662T-90CI Top AT52BR1664T-70CI Top AT52BR1664T-90CI Top AT52BR1662-70CI Bottom AT52BR1662-90CI Bottom AT52BR1664-70CI Bottom AT52BR1664-90CI Bottom Package Type AT52BR1662(T)/1664(T) Package Operation Range 66C5 Industrial (-40° to 85°C) 66C5 Industrial (-40° to 85°C) 66C5 Industrial (-40° to 85°C) 66C5 Industrial (-40° ...
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Packaging Information 66C5 – CBGA Marked A1 Identifier D Top View 0.60 REF Øb Bottom View TITLE 2325 Orchard Parkway San Jose, CA 95131 R AT52BR1662(T)/1664( ...
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... No licenses to patents or other intellectual property of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are not authorized for use as critical components in life support devices or systems. ...